1. Theory
- Definition: An LPCVD furnace deposits films from gases reacting on hot wafers in a hot-wall tube at well below atmospheric pressure (Georgia Tech; MIT).
- Grove model: Gas transport and surface reaction act in series, so the slower step sets the rate (KTH; MIT).
- Why low pressure: Gas diffusivity varies as , so lowering pressure raises and keeps growth reaction-limited, with excellent uniformity and purity (MIT; Georgia Tech).
- Temperature sensitivity: Reaction-limited growth is Arrhenius, 1.7 eV for silane polysilicon, so temperature control sets uniformity (KTH; MIT).
- Structure: Silicon deposits amorphous below 575 C and columnar polycrystalline above 625 C (KTH).
2. Working Principle
- Hot-wall tube: Wafers sit in a uniformly heated tube with no carrier gas; walls are coated too, so tubes are dedicated to one film (MIT).
- Pressure: About 0.1 to 1 Torr (KTH), with Georgia Tech quoting 0.2 to 20 Torr.
- Films: Polysilicon from silane at 600 to 650 C, nitride from dichlorosilane and ammonia at 650 to 800 C, oxide from TEOS at 650 to 750 C or from silane and oxygen at 400 to 450 C (KTH; Georgia Tech).
3. Applications
- Gate and electrode polysilicon: Doped below 1 m cm after anneal (KTH).
- Nitride masks for oxidation: Thin stoichiometric nitride, limited to about 2000 angstrom by stress (KTH; Thermal Oxidation Furnace page).
- Conformal dielectrics: TEOS oxide over steps, and PSG or BPSG reflow (KTH).
Grove Model and Low Pressure
| Name | Formula | Related Formulae | Variables/Constants |
|---|---|---|---|
| Grove fluxes | |||
| Growth rate | |||
| Low pressure |
Polysilicon and Nitride
| Name | Formula | Related Formulae | Variables/Constants |
|---|---|---|---|
| Polysilicon | |||
| Silicon nitride | |||
| Nitride stress limit |
Oxides and Conformality
| Name | Formula | Related Formulae | Variables/Constants |
|---|---|---|---|
| Oxide sources | |||
| Conformality | |||
| Doped glass and poly |
Important Questions
Ques: Why does an LPCVD furnace work at low pressure?
To keep growth reaction-limited and uniform. MIT gives the transport flux with , and notes that scales as through the mean free path. Lowering the pressure therefore raises and extends the regime where the surface reaction, not gas delivery, sets the rate. Going from 760 to 0.5 raises about 1520 times (computed). Georgia Tech states that LPCVD gives excellent uniformity and purity at a lower rate than APCVD. MIT adds that there is no carrier gas, and that the hot-walled furnace eases temperature control but coats the walls, so each tube is dedicated to one species. Because gas delivery no longer limits growth, wafers can be loaded closely in a tube (my reading). Reference: MIT 3.155J/6.152J Micro/Nano Processing Technology, ‘CVD’ lecture slides (12 October 2005): J1 = hg(Cg - Cs) with hg = Dg/delta, J2 = ks Cs, growth rate v = (Cg/Nf)/(1/hg + 1/ks), transport-limited v = hg Cg/Nf roughly as T^(1/2), reaction-limited v = ks Cg/Nf Arrhenius, Dg proportional to 1/P through the mean free path, lower pressure enlarging hg and extending the reaction-limited regime, LPCVD kinetically throttled without carrier gas, conformal, strongly T dependent, hot-walled furnace easing T control but coating walls so tubes are dedicated, LPCVD Knudsen number described as much greater than 1, silane pyrolysis SiH4 -> Si + 2H2 at about 650 C giving poor Si at 1 atm, 3SiCl2H2 + 4NH3 -> Si3N4 + 6H2 + 6HCl, susceptor tilt of 3 to 10 degrees to compensate the boundary layer and give uniform growth (fetch-tool summary); W. A. Doolittle, ECE 6450 Lectures 13 and 14 ‘CVD and Epitaxy’, Georgia Institute of Technology: rate set by reaction rate (temperature, pressure) and gas arrival (throughput Q = CP), APCVD high rate but poorer uniformity and purity, LPCVD at about 0.2 to 20 torr with excellent uniformity and purity at lower rate for polysilicon and dielectrics, polysilicon from 100 per cent or 20 to 30 per cent silane at about 0.2 to 1 torr and about 575 to 650 C (too slow when colder, gas-phase particles and poor adhesion when hotter), nitride 3SiH4 + 4NH3 -> Si3N4 + 12H2 at about 700 to 900 C or dichlorosilane + NH3 at about 700 to 800 C with up to 8 per cent hydrogen, oxides from silane + O2 below 500 C, DCS + N2O about 900 C, TEOS 650 to 750 C and TEOS + ozone about 400 C, film stress limiting thickness (fetch-tool summary).
Ques: How does the Grove model describe CVD growth?
As two steps in series. KTH and MIT give the transport flux and the surface flux ; equating them gives MIT’s growth rate . When growth is reaction-limited, , and follows an Arrhenius law. When it is transport-limited, , and varies only about as (MIT). With KTH’s 1.7 activation energy for silane polysilicon, raising the temperature from 600 to 620 increases the rate 1.66 times, about 2.6 per cent per degree (computed). A reaction-limited furnace therefore needs very even temperature along the whole load, while the exact gas flow pattern matters much less, which is the opposite of the boundary-layer case where MIT tilts the susceptor by 3 to 10 degrees to even out growth (my reading). Reference: KTH Royal Institute of Technology, Lecture 8 ‘CVD and ALD’ (course slides): Grove fluxes F1 = hg(Cg - Cs) and F2 = ks Cs with Cg = y Ct, surface-reaction limited when ks small and transport limited when hg small, thermal CVD 400 to 900 C, LPCVD 0.1 to 1 torr, SiH4 poly activation energy 1.7 eV, poly at 600 to 650 C via SiH4 -> SiH2 + H2 -> Si, amorphous below 575 C, microcrystalline near 600 C, columnar (110) above 625 C, examples 620 C at 160 mTorr (poly) and 580 C at 400 mTorr (amorphous), doped poly below 1 mOhm cm after anneal, grain-boundary diffusion about 1000 times faster, nitride 3SiH2Cl2 + 4NH3 -> Si3N4 + 6HCl + 6H2 at 650 to 800 C or silane with excess NH3 at 700 to 900 C, large tensile stress limiting nitride on Si to about 2000 angstrom before cracking, TEOS 650 to 750 C, LTO SiH4 + O2 at 400 to 450 C, TEOS more conformal than LTO because it sticks less, PSG reflow 1000 to 1100 C and BPSG about 800 C (fetch-tool summary); MIT 3.155J/6.152J Micro/Nano Processing Technology, ‘CVD’ lecture slides (12 October 2005): J1 = hg(Cg - Cs) with hg = Dg/delta, J2 = ks Cs, growth rate v = (Cg/Nf)/(1/hg + 1/ks), transport-limited v = hg Cg/Nf roughly as T^(1/2), reaction-limited v = ks Cg/Nf Arrhenius, Dg proportional to 1/P through the mean free path, lower pressure enlarging hg and extending the reaction-limited regime, LPCVD kinetically throttled without carrier gas, conformal, strongly T dependent, hot-walled furnace easing T control but coating walls so tubes are dedicated, LPCVD Knudsen number described as much greater than 1, silane pyrolysis SiH4 -> Si + 2H2 at about 650 C giving poor Si at 1 atm, 3SiCl2H2 + 4NH3 -> Si3N4 + 6H2 + 6HCl, susceptor tilt of 3 to 10 degrees to compensate the boundary layer and give uniform growth (fetch-tool summary).
Ques: How is LPCVD polysilicon deposited, and how does temperature set its structure?
By silane pyrolysis near 600 to 650 . KTH writes the steps as and , and gives the structure: amorphous below 575 , microcrystalline near 600 , and columnar with (110) texture above 625 . Its examples are polysilicon at 620 and 160 and amorphous silicon at 580 and 400 . Georgia Tech gives 575 to 650 at 0.2 to 1 , with too slow a rate when colder and gas-phase particles and poor adhesion when hotter. MIT notes that silane pyrolysis at 1 atm gives poor silicon, hence low pressure. KTH adds that doped poly falls below 1 after anneal, and that grain-boundary diffusion is about 1000 times faster. Reference: KTH Royal Institute of Technology, Lecture 8 ‘CVD and ALD’ (course slides): Grove fluxes F1 = hg(Cg - Cs) and F2 = ks Cs with Cg = y Ct, surface-reaction limited when ks small and transport limited when hg small, thermal CVD 400 to 900 C, LPCVD 0.1 to 1 torr, SiH4 poly activation energy 1.7 eV, poly at 600 to 650 C via SiH4 -> SiH2 + H2 -> Si, amorphous below 575 C, microcrystalline near 600 C, columnar (110) above 625 C, examples 620 C at 160 mTorr (poly) and 580 C at 400 mTorr (amorphous), doped poly below 1 mOhm cm after anneal, grain-boundary diffusion about 1000 times faster, nitride 3SiH2Cl2 + 4NH3 -> Si3N4 + 6HCl + 6H2 at 650 to 800 C or silane with excess NH3 at 700 to 900 C, large tensile stress limiting nitride on Si to about 2000 angstrom before cracking, TEOS 650 to 750 C, LTO SiH4 + O2 at 400 to 450 C, TEOS more conformal than LTO because it sticks less, PSG reflow 1000 to 1100 C and BPSG about 800 C (fetch-tool summary); W. A. Doolittle, ECE 6450 Lectures 13 and 14 ‘CVD and Epitaxy’, Georgia Institute of Technology: rate set by reaction rate (temperature, pressure) and gas arrival (throughput Q = CP), APCVD high rate but poorer uniformity and purity, LPCVD at about 0.2 to 20 torr with excellent uniformity and purity at lower rate for polysilicon and dielectrics, polysilicon from 100 per cent or 20 to 30 per cent silane at about 0.2 to 1 torr and about 575 to 650 C (too slow when colder, gas-phase particles and poor adhesion when hotter), nitride 3SiH4 + 4NH3 -> Si3N4 + 12H2 at about 700 to 900 C or dichlorosilane + NH3 at about 700 to 800 C with up to 8 per cent hydrogen, oxides from silane + O2 below 500 C, DCS + N2O about 900 C, TEOS 650 to 750 C and TEOS + ozone about 400 C, film stress limiting thickness (fetch-tool summary); MIT 3.155J/6.152J Micro/Nano Processing Technology, ‘CVD’ lecture slides (12 October 2005): J1 = hg(Cg - Cs) with hg = Dg/delta, J2 = ks Cs, growth rate v = (Cg/Nf)/(1/hg + 1/ks), transport-limited v = hg Cg/Nf roughly as T^(1/2), reaction-limited v = ks Cg/Nf Arrhenius, Dg proportional to 1/P through the mean free path, lower pressure enlarging hg and extending the reaction-limited regime, LPCVD kinetically throttled without carrier gas, conformal, strongly T dependent, hot-walled furnace easing T control but coating walls so tubes are dedicated, LPCVD Knudsen number described as much greater than 1, silane pyrolysis SiH4 -> Si + 2H2 at about 650 C giving poor Si at 1 atm, 3SiCl2H2 + 4NH3 -> Si3N4 + 6H2 + 6HCl, susceptor tilt of 3 to 10 degrees to compensate the boundary layer and give uniform growth (fetch-tool summary).
Ques: What limits LPCVD silicon nitride?
Its large tensile stress. KTH gives the dichlorosilane reaction at 650 to 800 and the silane route at 700 to 900 with excess ammonia, and the equation balances in Si, Cl, H and N (computed). KTH also states that about 2000 is the maximum on silicon before cracking becomes an issue. Georgia Tech notes that any dissimilar deposited film is stressed, limiting thickness before the wafer bows or cracks, and that nitride contains up to 8 per cent hydrogen. Film stress is measured from wafer bow (Wafer Curvature Stress Gauge page). Thin nitride is the usual oxidation mask (Thermal Oxidation Furnace page; my reading). Reference: KTH Royal Institute of Technology, Lecture 8 ‘CVD and ALD’ (course slides): Grove fluxes F1 = hg(Cg - Cs) and F2 = ks Cs with Cg = y Ct, surface-reaction limited when ks small and transport limited when hg small, thermal CVD 400 to 900 C, LPCVD 0.1 to 1 torr, SiH4 poly activation energy 1.7 eV, poly at 600 to 650 C via SiH4 -> SiH2 + H2 -> Si, amorphous below 575 C, microcrystalline near 600 C, columnar (110) above 625 C, examples 620 C at 160 mTorr (poly) and 580 C at 400 mTorr (amorphous), doped poly below 1 mOhm cm after anneal, grain-boundary diffusion about 1000 times faster, nitride 3SiH2Cl2 + 4NH3 -> Si3N4 + 6HCl + 6H2 at 650 to 800 C or silane with excess NH3 at 700 to 900 C, large tensile stress limiting nitride on Si to about 2000 angstrom before cracking, TEOS 650 to 750 C, LTO SiH4 + O2 at 400 to 450 C, TEOS more conformal than LTO because it sticks less, PSG reflow 1000 to 1100 C and BPSG about 800 C (fetch-tool summary); W. A. Doolittle, ECE 6450 Lectures 13 and 14 ‘CVD and Epitaxy’, Georgia Institute of Technology: rate set by reaction rate (temperature, pressure) and gas arrival (throughput Q = CP), APCVD high rate but poorer uniformity and purity, LPCVD at about 0.2 to 20 torr with excellent uniformity and purity at lower rate for polysilicon and dielectrics, polysilicon from 100 per cent or 20 to 30 per cent silane at about 0.2 to 1 torr and about 575 to 650 C (too slow when colder, gas-phase particles and poor adhesion when hotter), nitride 3SiH4 + 4NH3 -> Si3N4 + 12H2 at about 700 to 900 C or dichlorosilane + NH3 at about 700 to 800 C with up to 8 per cent hydrogen, oxides from silane + O2 below 500 C, DCS + N2O about 900 C, TEOS 650 to 750 C and TEOS + ozone about 400 C, film stress limiting thickness (fetch-tool summary); Wafer Curvature Stress Gauge page of this vault; Thermal Oxidation Furnace page of this vault.
Ques: Why is TEOS oxide more conformal than LTO?
Because TEOS sticks less. KTH lists LTO from silane and oxygen at 400 to 450 and LPCVD TEOS at 650 to 750 . It states that LTO is non-conformal because of its short mean free path and lack of surface migration, and that TEOS sticks less than LTO, so the difference is attributed mainly to sticking rather than surface transport. MIT defines the sticking coefficient as . In my reading, a molecule with low bounces several times inside a trench before reacting, which spreads the deposit down the sidewalls. Georgia Tech notes that silane oxide below 500 carries HO, SiH and SiOH impurities, so conformality and purity both favour TEOS. KTH adds that PSG reflows at 1000 to 1100 and BPSG near 800 . Reference: KTH Royal Institute of Technology, Lecture 8 ‘CVD and ALD’ (course slides): Grove fluxes F1 = hg(Cg - Cs) and F2 = ks Cs with Cg = y Ct, surface-reaction limited when ks small and transport limited when hg small, thermal CVD 400 to 900 C, LPCVD 0.1 to 1 torr, SiH4 poly activation energy 1.7 eV, poly at 600 to 650 C via SiH4 -> SiH2 + H2 -> Si, amorphous below 575 C, microcrystalline near 600 C, columnar (110) above 625 C, examples 620 C at 160 mTorr (poly) and 580 C at 400 mTorr (amorphous), doped poly below 1 mOhm cm after anneal, grain-boundary diffusion about 1000 times faster, nitride 3SiH2Cl2 + 4NH3 -> Si3N4 + 6HCl + 6H2 at 650 to 800 C or silane with excess NH3 at 700 to 900 C, large tensile stress limiting nitride on Si to about 2000 angstrom before cracking, TEOS 650 to 750 C, LTO SiH4 + O2 at 400 to 450 C, TEOS more conformal than LTO because it sticks less, PSG reflow 1000 to 1100 C and BPSG about 800 C (fetch-tool summary); MIT 3.155J/6.152J Micro/Nano Processing Technology, ‘CVD’ lecture slides (12 October 2005): J1 = hg(Cg - Cs) with hg = Dg/delta, J2 = ks Cs, growth rate v = (Cg/Nf)/(1/hg + 1/ks), transport-limited v = hg Cg/Nf roughly as T^(1/2), reaction-limited v = ks Cg/Nf Arrhenius, Dg proportional to 1/P through the mean free path, lower pressure enlarging hg and extending the reaction-limited regime, LPCVD kinetically throttled without carrier gas, conformal, strongly T dependent, hot-walled furnace easing T control but coating walls so tubes are dedicated, LPCVD Knudsen number described as much greater than 1, silane pyrolysis SiH4 -> Si + 2H2 at about 650 C giving poor Si at 1 atm, 3SiCl2H2 + 4NH3 -> Si3N4 + 6H2 + 6HCl, susceptor tilt of 3 to 10 degrees to compensate the boundary layer and give uniform growth (fetch-tool summary); W. A. Doolittle, ECE 6450 Lectures 13 and 14 ‘CVD and Epitaxy’, Georgia Institute of Technology: rate set by reaction rate (temperature, pressure) and gas arrival (throughput Q = CP), APCVD high rate but poorer uniformity and purity, LPCVD at about 0.2 to 20 torr with excellent uniformity and purity at lower rate for polysilicon and dielectrics, polysilicon from 100 per cent or 20 to 30 per cent silane at about 0.2 to 1 torr and about 575 to 650 C (too slow when colder, gas-phase particles and poor adhesion when hotter), nitride 3SiH4 + 4NH3 -> Si3N4 + 12H2 at about 700 to 900 C or dichlorosilane + NH3 at about 700 to 800 C with up to 8 per cent hydrogen, oxides from silane + O2 below 500 C, DCS + N2O about 900 C, TEOS 650 to 750 C and TEOS + ozone about 400 C, film stress limiting thickness (fetch-tool summary).
Ques: What pressure does LPCVD run at, and which figure is more likely?
About 0.1 to 1 is more likely. KTH gives 0.1 to 1 for LPCVD, while Georgia Tech gives about 0.2 to 20 . The film-specific values support the lower range: Georgia Tech itself deposits polysilicon at 0.2 to 1 , and KTH’s examples are 160 and 400 . The upper part of the Georgia Tech range overlaps conditions KTH assigns to rapid thermal CVD, above 10 . Its 20 end is therefore more likely a general sub-atmospheric bound than a typical tube setting (my reading). The temperature windows differ slightly too, dichlorosilane nitride at 650 to 800 (KTH) against 700 to 800 (Georgia Tech), but these overlap. Reference: KTH Royal Institute of Technology, Lecture 8 ‘CVD and ALD’ (course slides): Grove fluxes F1 = hg(Cg - Cs) and F2 = ks Cs with Cg = y Ct, surface-reaction limited when ks small and transport limited when hg small, thermal CVD 400 to 900 C, LPCVD 0.1 to 1 torr, SiH4 poly activation energy 1.7 eV, poly at 600 to 650 C via SiH4 -> SiH2 + H2 -> Si, amorphous below 575 C, microcrystalline near 600 C, columnar (110) above 625 C, examples 620 C at 160 mTorr (poly) and 580 C at 400 mTorr (amorphous), doped poly below 1 mOhm cm after anneal, grain-boundary diffusion about 1000 times faster, nitride 3SiH2Cl2 + 4NH3 -> Si3N4 + 6HCl + 6H2 at 650 to 800 C or silane with excess NH3 at 700 to 900 C, large tensile stress limiting nitride on Si to about 2000 angstrom before cracking, TEOS 650 to 750 C, LTO SiH4 + O2 at 400 to 450 C, TEOS more conformal than LTO because it sticks less, PSG reflow 1000 to 1100 C and BPSG about 800 C (fetch-tool summary); W. A. Doolittle, ECE 6450 Lectures 13 and 14 ‘CVD and Epitaxy’, Georgia Institute of Technology: rate set by reaction rate (temperature, pressure) and gas arrival (throughput Q = CP), APCVD high rate but poorer uniformity and purity, LPCVD at about 0.2 to 20 torr with excellent uniformity and purity at lower rate for polysilicon and dielectrics, polysilicon from 100 per cent or 20 to 30 per cent silane at about 0.2 to 1 torr and about 575 to 650 C (too slow when colder, gas-phase particles and poor adhesion when hotter), nitride 3SiH4 + 4NH3 -> Si3N4 + 12H2 at about 700 to 900 C or dichlorosilane + NH3 at about 700 to 800 C with up to 8 per cent hydrogen, oxides from silane + O2 below 500 C, DCS + N2O about 900 C, TEOS 650 to 750 C and TEOS + ozone about 400 C, film stress limiting thickness (fetch-tool summary).
References
- W. A. Doolittle, “CVD and epitaxy,” ECE 6450 Lectures 13 and 14, Georgia Institute of Technology. Available: https://alan.ece.gatech.edu/ECE6450/Lectures/ECE6450L13and14-CVD%20and%20Epitaxy.pdf
- KTH Royal Institute of Technology, “Lecture 8: CVD and ALD,” course slides. Available: https://www.kth.se/social/upload/510bc6e8f276547a4fe3c222/Lecture%208.pdf
- MIT 3.155J/6.152J Micro/Nano Processing Technology, “CVD,” lecture slides, 12 October 2005, MIT OpenCourseWare. Available: https://www.ocw.mit.edu/courses/6-152j-micro-nano-processing-technology-fall-2005/cad5227ddbdf120be10a0c372f2ccedd_cvd.pdf
- Thermal Oxidation Furnace page of this vault.
- Wafer Curvature Stress Gauge page of this vault.
Related pages in this vault: Thermal Oxidation Furnace, Diffusion Furnace, Wafer Curvature Stress Gauge, Spectroscopic Ellipsometer, PECVD Reactor, Atomic Layer Deposition (ALD) Reactor, MOCVD Reactor.