1. Theory
- Definition: The silicon heterojunction cell (HJT, HIT or SHJ) is built on a crystalline-silicon wafer, usually n-type, with a thin stack of hydrogenated amorphous silicon (a-Si:H) on each side: an intrinsic layer of a few nm that passivates the surface, and a doped layer (boron on one side, phosphorus on the other) that makes the contact selective. Layers of a transparent conductive oxide (ITO) spread the current to the metal fingers and act as the anti-reflection coating. All layers are deposited by plasma-enhanced chemical vapour deposition (PECVD) and sputtering below about 200 to 260 °C.
- Band lineup: Fuhs et al. give a gap of 1.75 eV for the a-Si:H against 1.15 eV for the crystalline silicon, with offsets of 0.14 eV in the conduction band and 0.45 eV in the valence band; the valence offset is about three times the conduction offset. The Fermi level of the amorphous layer lies 0.55 eV (boron), 1.04 eV (intrinsic) or 1.49 eV (phosphorus) above the valence band.
- History: Huasun states that Sanyo developed the cell in 1990 and that it was industrialized around 2010 (vendor press release, not checked). Panasonic reported 25.6 % in 2014 with a back-contact version on 143.7 cm, and Sharp 25.09 % for a 6-inch HJT-IBC cell in 2018.
- Records: Kaneka certified 26.3 ± 0.5 % on 180.4 cm for a back-contact cell (744 mV, 42.3 mA/cm, 83.8 %). LONGi reported 26.81 % for a cell with contacts on both sides (751.4 mV, 41.45 mA/cm, 86.07 %, series resistance reduced from 0.37 to 0.2 cm), confirmed by ISFH in November 2022, and 27.30 % for a back-contact cell in 2024. The theoretical limit given by Kaneka is 29.1 %.
- Thin wafers: Balaji et al. made cells on 42 µm wafers with 6 nm intrinsic layers (747 mV, 19.22 % on 153.9 cm, 20.48 % on 4 cm) and an implied voltage of 764 mV.
- Claims of the vendors: A temperature coefficient of -0.24 %/°C (Risen, Huasun) or -0.26 %/°C (Sinovoltaics), a bifaciality of 85 % (Risen), 90 % or more (Sinovoltaics) or nearly 100 % (Huasun), and four process steps against more than ten for PERC and TOPCon (Huasun). They are marketing statements; the notes below say how they compare with the calculation.
- Degradation: CEA-Liten finds that ultraviolet light dissociates Si-H bonds in the front n-type layer, which loses 63.3 % of the lifetime after 60 kWh/m of UVA when the phosphine flow is high and 9.5 % when the layer is undoped; light and heat soaking restore the passivation to near the initial level below a dose threshold. IPVF, EDF and INES find that sodium from soda-lime glass depassivates the cell, mainly on the front, and that moisture degrades the oxide and the contacts in damp heat (85 °C, 85 % humidity).
- Market: The ITRPV 14th edition forecasts a share of 19 % for heterojunction cells in 2033 (TOPCon 60 %).
2. Working Principle
- Passivation: The intrinsic a-Si:H layer saturates the dangling bonds of the silicon surface with hydrogen, so the saturation current of a surface falls to a few fA/cm or less and the effective lifetime reaches several ms. Balaji et al. lowered from 1.7 to 0.6 fA/cm with a 6 nm layer, whereas a 15 nm layer gave about 0.1 fA/cm. Kaneka reports 3.0 fA/cm for the cell and 0.9 for the best sample.
- Selective contact: The doped layer bends the bands of the wafer, so one carrier type collects and the other is repelled. At the hole contact the holes must cross the larger valence offset of 0.45 eV; the lowest contact resistivity of the stack is about six times higher for holes than for electrons (Luderer et al.).
- Thickness trade-off: A thicker intrinsic layer passivates better but raises the resistance and absorbs more light. Zhao finds a lifetime above 3 ms and an implied voltage above 720 mV at 6 nm, and 729 mV at 10 nm; a 3 nm nanocrystalline layer raised the front-contact fill factor from 0.56 to 0.73.
- Voltage limit: The open-circuit voltage is set by the total and by the built-in potential, which for the stack is about 0.8 eV (computed). Kaneka’s loss analysis finds 8 mV below the limit, 3.4 % in current and 5.3 % in fill factor.
- Current collection: The series resistance is the sum of the wafer, the two contacts, the lateral resistance of the oxide between the fingers and the grid. Kaneka measures 0.32 cm with a practical limit of 0.25.
- Low-temperature metallization: The paste is cured at 200 °C for 20 min; a reactive silver ink used 16.4 mg of silver per cell against 89.2 mg of paste, 82 % less (Martinez-Szewczyk et al.).
- Temperature: The high voltage lowers the loss of voltage with temperature, which explains part of the lower coefficient (computed).
3. Applications
- Mass production: Huasun states cell efficiencies of 26.5 % in production against a stated maximum of 29.20 %, and Risen claims energy gains of 4.37 to 6.54 % over PERC and 1.25 to 3.33 % over TOPCon; both are vendor statements.
- Back-contact cells: Kaneka, Panasonic, Sharp and LONGi combine the passivating stack with contacts on the rear, which removes the metal shading; an interdigitated cell made with semi-industrial equipment (ECN, 2015) reached 12.6 % on 13.3 cm, with more than 21 % expected once the rear metallization was solved.
- Bifacial and thin-wafer modules: The symmetric structure suits bifacial modules and thin wafers, although the vendors warn of cracks below 150 µm in glass-glass modules.
- Tandem base: The low process temperature fits the silicon bottom cell of the perovskite-silicon tandem, treated in a later page.
Band Alignment and Passivation
| Name | Formula | Related Formulae | Variables/Constants |
|---|---|---|---|
| Band offsets of the amorphous-crystalline silicon interface | |||
| Built-in potential of the hole contact and band bending of the electron contact | |||
| Open-circuit voltage and saturation current density | |||
| Effective lifetime and surface saturation current |
Contacts, Resistance and Fill Factor
| Name | Formula | Related Formulae | Variables/Constants |
|---|---|---|---|
| Specific contact resistivity of the transparent-oxide and amorphous-silicon stack | |||
| Lateral resistance of the transparent oxide between the fingers | |||
| Fill factor, pseudo fill factor and series resistance |
Efficiency, Temperature and Degradation
| Name | Formula | Related Formulae | Variables/Constants |
|---|---|---|---|
| Efficiency from the reported parameters | |||
| Loss budget against the theoretical limit | |||
| Temperature coefficient of the voltage and of the power | |||
| Equivalent irradiance of a bifacial module | |||
| Ultraviolet lifetime loss and its effect on the voltage |
Important Questions
Ques: Which Kaneka record is right: 26.3, 26.63 or 26.7 %?
Yoshikawa et al. print 26.3 ± 0.5 % on a designated area of 180.4 certified by Fraunhofer ISE, and mention a later value of 26.6 %. The Kaneka press release of 25 August 2017 gives 26.63 % at 180 , and TaiyangNews quotes Kaneka at 26.7 % on 79 and 26.6 % on 179.74 . The product of 744 mV, 42.3 and 83.8 % is 26.37 % (computed). The values are not in conflict: 26.63 % lies inside the 26.3 ± 0.5 % band, and the 26.7 % belongs to a smaller area, so it should not be compared. The 26.3 % is the certified value of the cell in the paper and the 26.63 % is more likely the later improved cell. The pv magazine article gives the area as 180 mm2, which I take as a unit error for . Reference: Yoshikawa, Yoshida, Irie et al., ‘Silicon heterojunction solar cell with interdigitated back contacts for a photoconversion efficiency over 26 %’, Nature Energy 2, 17032 (2017); Kaneka press release on 26.63 % heterojunction back-contact cell (25 August 2017); TaiyangNews, article on the Sharp 25.09 % HJT-IBC cell and Kaneka records (1 April 2018); pv magazine, LONGi 26.81 % silicon heterojunction cell citing Nature Energy (May 2023).
Ques: Is the efficiency limit of the heterojunction cell 29.1, 29.2 or 27.5 %?
Yoshikawa et al. compute a theoretical limit of 29.1 % (752 mV, 43.7 , 88.5 %), which the product confirms as 29.08 % (computed). Huasun quotes a maximum cell efficiency of 29.20 % against 29.40 % for silicon, and TaiyangNews (on the TOPCon page) a potential of 27.5 % for heterojunction cells. Kaneka also gives a practical limit of 27.1 %. The numbers answer different questions. The 29.4 % is the intrinsic limit of silicon, 29.1 % is calculated for this cell structure, and 27.1 % is a practical limit. The basis of 29.20 % and 27.5 % is not stated, and the LONGi back-contact cell of 27.30 % already exceeds the practical limit, so that is not a hard bound. For the structure 29.1 % is more likely, and 27.1 to 27.5 % is a sensible target for production. Reference: Yoshikawa, Yoshida, Irie et al., ‘Silicon heterojunction solar cell with interdigitated back contacts for a photoconversion efficiency over 26 %’, Nature Energy 2, 17032 (2017); Huasun press release in pv magazine (vendor); TaiyangNews, ‘What’s Top in TOPCon Solar Cell Technology?’ (via the TOPCon page of this vault).
Ques: Are the band offsets 0.14 and 0.45 eV or 0.18 and 0.46 eV?
Fuhs et al. state in the abstract a conduction offset of 0.14 eV and a valence offset of 0.45 eV, and in the text 0.18 ± 0.07 eV and 0.46 ± 0.05 eV. The gaps of 1.75 and 1.15 eV differ by 0.60 eV, which the abstract pair matches to 0.59 eV, whereas the text pair adds to 0.64 eV (computed). The ratio of valence to conduction offset is 3.2 for the first pair and 2.6 for the second. Both pairs agree within the stated errors, because 0.14 lies inside 0.18 ± 0.07. The abstract values are more likely for the sum rule, but the conduction offset has the larger uncertainty, so I would quote 0.14 to 0.18 eV and 0.45 to 0.46 eV. The conclusion that the valence offset is two to three times larger holds for both. Reference: Fuhs, Korte and Schmidt, J. Optoelectron. Adv. Mater. 8(6), 1989-1995 (2006).
Ques: Is the gap of the amorphous layer 1.75, 1.7 or 1.8 eV?
Fuhs et al. give 1.75 eV in the abstract and 1.76 ± 0.05 eV in the text, and Zhao gives a gap of about 1.7 eV and a mobility gap of 1.8 eV. They do not disagree, because the quantities differ. The optical gap follows from the absorption edge, the mobility gap is the separation of the extended states and is larger because of the band tails; both depend on the hydrogen content and the deposition temperature (best layers near 210 °C, Fuhs et al.). The sum rule of the band offsets needs the same definition on both sides. With 1.15 eV for the crystalline silicon the choice between 1.7 and 1.8 eV changes the sum of the offsets from 0.55 to 0.65 eV (computed). For band diagrams the mobility gap of 1.8 eV is more likely the right one, for absorption the optical gap. Reference: Fuhs, Korte and Schmidt, J. Optoelectron. Adv. Mater. 8(6), 1989-1995 (2006); Zhao, MSc thesis on silicon heterojunction cells, TU Delft (2018).
Ques: Which bifaciality is correct: 85 %, 90 % or nearly 100 %?
Risen states a bifaciality of about 85 %, 15 points above PERC and 5 above TOPCon, Sinovoltaics says that 90 % or more can be reached, and Huasun claims nearly 100 %. None of the three gives the definition or the measurement. The factor is the ratio of the short-circuit current (or of the power) when the rear is lit to that when the front is lit, and it differs for each definition; with a rear irradiance of 100 it adds 85 or 90 to the 1000 at the front (computed, assumed irradiance). A symmetric cell can approach 100 % in current in principle, while the rear grid and the module construction lower it (background reasoning). For modules, 85 to 90 % is more likely, and I treat 100 % as an upper limit. Reference: Risen Energy press release on heterojunction modules (vendor); Sinovoltaics, ‘Heterojunction Technology (HJT): What It Is and Why It Matters for Solar Panel Quality’ (consultancy page); Huasun press release in pv magazine (vendor).
Ques: Is the temperature coefficient -0.24 or -0.26 %/°C, and why is it better than PERC?
Risen and Huasun state -0.24 %/°C, Sinovoltaics ‘around -0.26 %/°C’, and Risen gives -0.32 for TOPCon and -0.35 for PERC. The relation for the voltage with a gap of 1.205 V and an exponent of 3 gives -1.80 for 744 mV, i.e. -0.243 %/K, against -0.279 %/K for 700 mV (computed, parameters assumed). The voltage explains only 0.036 of the 0.11 %/K gap to PERC. The remainder would come from the current and fill factor, which the sources do not analyse. The voltage term alone matches -0.24, which suggests that the other terms nearly cancel, but that is my reading. -0.24 to -0.26 %/°C is the likely range, but the figures come from vendors and need a datasheet or a test report. Reference: Risen Energy press release on heterojunction modules (vendor); Huasun press release in pv magazine (vendor); Sinovoltaics, ‘Heterojunction Technology (HJT): What It Is and Why It Matters for Solar Panel Quality’ (consultancy page).
Ques: Is the surface saturation current 0.1, 0.6, 0.9 or 3.0 fA/cm2?
Balaji et al. reduce from 1.7 to 0.6 with a 6 nm layer and refer to about 0.1 for a 15 nm layer, and Yoshikawa et al. give 3.0 for the cell and 0.9 for the best sample. The lifetime relation gives upper bounds of 4.5 and 2.7 for the Kaneka lifetimes of 8.8 and 14.9 ms (computed, injection assumed), so 3.0 and 0.9 are consistent with the lifetimes. The implied total of the cell from 744 mV and 42.3 is 11.2 , so if 3.0 is per surface about 5 remain for the bulk, the contacts and the metal (computed, a single diode assumed). The values belong to different samples: a finished cell, a best sample, a thin-wafer test and earlier work. For a finished cell 3 is more likely, and for test samples 0.6 to 0.9. Reference: Yoshikawa, Yoshida, Irie et al., ‘Silicon heterojunction solar cell with interdigitated back contacts for a photoconversion efficiency over 26 %’, Nature Energy 2, 17032 (2017); Balaji et al., Sol. Energy Mater. Sol. Cells 216, 110715 (2020).
Ques: How thick should the intrinsic layer be: 6, 10 or 15 nm?
Balaji et al. use 6 nm and mention that the earlier work with 15 nm reached lower values of (about 0.1 against 0.6). Zhao reports a lifetime above 3 ms and an implied voltage above 720 mV at 6 nm and 729 mV at 10 nm, and Fuhs et al. note that their best cell of 19.8 % had no intrinsic layer at all. The answers come from one trade-off: passivation improves with thickness, whereas the resistance, the hole contact in particular (the layer adds about 150 to it and 10 to the electron contact, Luderer et al.), and the parasitic absorption rise. The sources do not say why that cell needed none, so I give it less weight. Layers of 5 to 10 nm are more likely for modern cells. Reference: Balaji et al., Sol. Energy Mater. Sol. Cells 216, 110715 (2020); Zhao, MSc thesis on silicon heterojunction cells, TU Delft (2018); Fuhs, Korte and Schmidt, J. Optoelectron. Adv. Mater. 8(6), 1989-1995 (2006); Luderer et al., contact resistivity of TCO/a-Si:H/c-Si stacks, 36th EU PVSEC (2019).
Ques: Can the fill factor exceed the ideal-diode value?
The ideal diode with an ideality factor of 1 has a fill factor of 85.34 % at 744 mV and 85.45 % at 751.4 mV (Green’s expression, computed). LONGi reports 86.07 % at 751.4 mV, and Kaneka gives a theoretical limit of 88.5 %, both above that value. This is not an error. Auger recombination dominates at high injection in clean n-type silicon and lowers the ideality factor, so the limit is higher than for the single diode. The same holds for the pseudo fill factor of 85.6 % of Kaneka. The measured values are therefore plausible; ISFH confirmed the cell, and the product (26.81 %) matches. The series resistance of 0.2 would cost about 0.9 points in the simple model (computed). I treat the numbers as consistent. Reference: pv magazine, LONGi 26.81 % silicon heterojunction cell citing Nature Energy (May 2023); Yoshikawa, Yoshida, Irie et al., ‘Silicon heterojunction solar cell with interdigitated back contacts for a photoconversion efficiency over 26 %’, Nature Energy 2, 17032 (2017).
Ques: Is the ultraviolet degradation of heterojunction cells a hydrogen effect or a sodium effect?
CEA-Liten attributes the ultraviolet loss to photons that break Si-H bonds, so hydrogen moves and inactive P-Si-H-Si complexes form in the front n-type layer; the lifetime loss is 63.3 % for a high phosphine flow and 9.5 % for undoped layers after 60 of UVA, and light-soaking at temperature restores most of it. IPVF and its partners find that sodium ions from soda-lime glass depassivate the cell, mainly at the front, while moisture raises the series resistance in damp heat; sodium-free glass reduces the loss, but neither article gives a percentage. The mechanisms act on different layers (the selective layer against the interface and the oxide) and in different tests, so they do not conflict. In a module both can occur. A lifetime loss of 63.3 % corresponds to about 26 mV at low injection (computed), which indicates the possible size. Reference: pv magazine, ‘French scientists discover new UV-induced degradation pathways in heterojunction solar cells’ (22 January 2026); pv magazine, ‘The impact of sodium, moisture on heterojunction PV module performance’ (9 October 2024).
Ques: Is the thin-wafer cell of Balaji et al. ‘close to 21 %’, ‘above 21 %’ or 20.48 %?
The introduction of Balaji et al. says that the cell on a 42 µm wafer is close to 21 %, the conclusions say that it exceeds 21 %, and the measured best is 20.48 % on 4 with SiO:ITO; the large-area cell has 19.22 % on 153.9 (747 mV, 34.0 , 75.7 %). The product of the large-area values is 19.23 % (computed), so the table is consistent. The text figures are looser than the data, and no measurement above 21 % appears in what I read. The implied voltage of 764 mV is a lifetime result, not a cell result, and the low fill factor of 75.7 % limits the large cell. The measured 20.48 % is the more likely value; I read ‘above 21 %’ as an extrapolation or an error. The paper should be checked against its printed table. Reference: Balaji et al., Sol. Energy Mater. Sol. Cells 216, 110715 (2020).
Related pages in this vault: Interdigitated Back-Contact (IBC) Silicon Cell, TOPCon Silicon Cell, PERC and PERT Silicon Cell, Amorphous and Microcrystalline Silicon Thin-Film Solar Cell, Solar Cell Fundamentals, Solar Cells and Modules (Crystalline Silicon and Thin Film).