Silicon MOS-Capacitor Modulator

1. Theory

• Definition: A silicon MOS-capacitor modulator has a thin gate dielectric (a few nanometres of oxide) between two silicon regions, one n-type and one p-type, inside a waveguide. A voltage across the oxide accumulates, depletes or inverts carriers on the two sides of the oxide, directly inside the optical mode, and so changes the index by the plasma dispersion effect (the patent; Debnath et al.). Silicon-insulator-silicon capacitor (SISCAP) is the name of the same structure in the patent.
• Why it is efficient: The charge sits within a few nanometres of the oxide, where the mode is strongest, and it is set by the capacitance $c={\epsilon }_{ox}{h}_{ox}/t_{ox}$. Debnath et al. simulate $V_{\pi }L$ from 2.40 $\mathrm{V}\mathrm{cm}$ (20 $\mathrm{nm}$ oxide) to 0.53 $\mathrm{V}\mathrm{cm}$ (5 $\mathrm{nm}$), and measure 1.53 $\mathrm{V}\mathrm{cm}$ at 6 V; Hiraki et al. report 0.09 $\mathrm{V}\mathrm{cm}$ for a III-V/Si device.
• Accumulation and depletion: In accumulation majority carriers are pulled to the oxide (the phase is nearly linear in voltage, Debnath et al.) and the index change is large; in depletion the carriers are removed and the capacitance is lower (Hiraki et al. give 2.2 GHz in depletion mode). The patent describes both with transient gate currents of about 10 and 25 mA.
• Drude picture: The index change per carrier is $\Delta n\propto 1/m^{\ast }$ (the patent’s Drude relations), so a III-V semiconductor with a small electron mass gives a larger change per carrier than silicon; for $1\times 10^{18}$ $\mathrm{c}{\mathrm{m}}^{-3}$ the computed values are $-1.2\times 10^{-3}$ (silicon, 0.26 $m_0$) and $-6.2\times 10^{-3}$ for an assumed 0.05 $m_0$.
• History: The first MOS silicon modulator (Liu et al., 2004) reached more than 1 GHz, with a 2.5 mm shifter, a gate oxide of about 12 nm and a 3.5 V pulse on 3 V bias, and $6.7\mathrm{dB}$ of on-chip loss mostly from polysilicon; the earlier silicon modulators were at about 20 MHz (abstract).
• Figures of merit: $V_{\pi }L$ (proportional to the oxide thickness), the capacitance per length, the loss-efficiency product $\alpha V_{\pi }L$, the RC bandwidth, the energy $\frac{1}{4}C{V}_{pp}^2$.
• Limits: The capacitance and the speed trade against each other through $t_{ox}$, the doping loss is 3.4 $dB/mm$ in the lateral device, and the transitions between the rib and the slot cost $5.5\mathrm{dB}$ each in the measured device.

2. Working Principle

• Structure: Debnath et al. cut a lateral slot of oxide in the rib (400 nm wide, 320 nm high, 100 nm slab), with n-type and p-type silicon on the two sides of the thin oxide slot (the fabrication lists a 10 nm thermal sidewall oxide and a 350 nm deposited amorphous-silicon layer), doped at about $6\times 10^{17}$ to $1\times 10^{18}$ $\mathrm{c}{\mathrm{m}}^{-3}$, and heavy contacts at $1\times 10^{20}$ $\mathrm{c}{\mathrm{m}}^{-3}$, 900 nm from the guide.
• Bias: A dc bias of 3 V keeps the capacitor in accumulation; the data signal of 6 V peak-to-peak adds and removes charge on both sides of the oxide.
• Phase: The stored charge $Q=C_{ox}V$ changes the index of the thin layers next to the oxide, and the phase follows the voltage almost linearly: $\Delta \phi =\pi VL/(V_{\pi }L)$.
• Interference: The phase shifter is in one arm of an unbalanced Mach-Zehnder (200 $\mu \mathrm{m}$ mismatch, free spectral range 2.6 nm), so the output intensity follows the phase as on page 99.
• Speed: The charge must flow through the doped silicon into the capacitor, so the bandwidth is $1/(2\pi RC)$: 52, 32 and 20 GHz simulated for 20, 10 and 5 $\mathrm{nm}$ (Debnath et al.); contacts of 11 $\Omega$ would limit a 500 $\mu \mathrm{m}$ device to about 23 GHz (computed).
• Energy: No current flows through the oxide at dc, so the energy is $\frac{1}{4}C{V}_{pp}^2$ with no static term, an estimated 5.6 pJ/bit for the 500 $\mu \mathrm{m}$ device at 6 V.

3. Applications

• Low-power phase tuning: A capacitor holds its phase without dc current, unlike the injection diode of the previous page (a few milliwatts), which suits bias control (the patent states a static power of substantially zero).
• Compact modulators: A 500 $\mu \mathrm{m}$ all-silicon device carried 25 Gbit/s with open eyes (Debnath et al.), compared with 2.5 mm at 1 Gbit/s in 2004 (Liu et al.).
• Hybrid III-V on silicon: The InGaAsP/Si MOS shifter of Hiraki et al. gives a $V_{\pi }L$ of 0.09 $\mathrm{V}\mathrm{cm}$ in 250 $\mu \mathrm{m}$ with about $1.0\mathrm{dB}$ of loss and 32 Gbit/s with pre-emphasis, for data-centre transmitters where length matters.
• Photonic-crystal switches: A MOS capacitor placed in a photonic-crystal waveguide was proposed for a switch with a 300 $\mu \mathrm{m}$ active region and a computed gate capacitance of 15 fF (a University of Texas conference paper; not read beyond its summary).

Free-Carrier Physics and Capacitance

Name	Formula	Related Formulae	Variables/Constants
Drude (free-carrier) index change	$\Delta n=-\frac{e^2{\lambda }^2}{8{\pi }^2{c}^2{\epsilon }_{0}n}\left(\frac{\Delta N_e}{m_e^{\ast }}+\frac{\Delta N_h}{m_h^{\ast }}\right)$	$\Delta \alpha =\frac{4\pi \Delta k}{\lambda }$ $\Delta \phi =\frac{2\pi \Delta nL}{\lambda }$	$e:elementarycharge$ $\lambda :vacuumwavelength$ $c:speedoflightinvacuum$ ${\epsilon }_0:vacuumpermittivity$ $n:refractiveindexofthematerial$ $\begin{array}{r}\Delta N_e,\Delta N_h:changesoftheelectronand\\ holedensities\end{array}$ $m_e^{\ast },m_h^{\ast }:effectivemasses(conductivitymasses)$ $\Delta k:changeoftheimaginaryindex$ $\begin{array}{r}L:activelength,theDrudeformandthe\\ phaseandabsorptionrelationsarethose\\ oftheSISCAPpatent(thepatentalso\\ gives\Delta kwiththemobilities),the\\ Soref-Bennettfitofpage99isthe\\ experimentalcounterpart,theNature\\ PhotonicsabstractsaysIII-V\\ semiconductorsofferastrong\\ electron-inducedindexchange,high\\ electronmobilityandlowplasma\\ absorption\end{array}$ $\begin{array}{r}(computedat1.55\mu \mathrm{m}withn=3.48\\ (silicon)for\Delta N=1\times 10^{18}\mathrm{c}{\mathrm{m}}^{-3}of\\ electrons:\Delta n=-1.19\times 10^{-3}for{m}_e^{\ast }=0.26\\ m_0,whichis1.35timestheSoref-Bennett\\ electronvalue-8.8\times 10^{-4};forholeswith\\ 0.39m_0-7.9\times 10^{-4}(lessthanthe\\ Soref-Bennettholevalue,sotheDrude\\ formisonlyindicativeforholes);foran\\ assumedelectronmassof0.05m_0(my\\ assumptionforaIII-Valloy,samen)\\ -6.2\times 10^{-3},thatis5.2timesthesilicon\\ value)\end{array}$
Oxide capacitance and stored charge	$C_{ox}=\frac{{\epsilon }_{ox}{h}_{ox}L}{t_{ox}}$ $Q=C_{ox}V$	$Q_{\pi }=c{V}_{\pi }L$ $c=\frac{{\epsilon }_{ox}{h}_{ox}}{t_{ox}}$	${\epsilon }_{ox}:permittivityoftheoxide$ $h_{ox}:heightoftheoxidesheetintherib$ $t_{ox}:oxide(slot)thickness$ $L:length$ $c:capacitanceperlength$ $\begin{array}{r}{Q}_{\pi }:chargeforaphaseshiftof\pi (ason\\ thepreviouspage),Debnathetal.:10\mathrm{nm}\\ designoxide,simulatedrange5to20\mathrm{nm},\\ aslotof14\mathrm{nm}extractedfromthe\\ measured{V}_{\pi }L,rib400nmwideand320nm\\ highon100nmslab,capacitanceabout\\ 1.25pF/mminaccumulationfor10\mathrm{nm},the\\ SISCAPpatent(US6845198):oxidesof30,\\ 80and200angstrom(3,8and20\mathrm{nm})\\ simulated,atmost1000angstromclaimed,\\ preferably200\end{array}$ $\begin{array}{r}(computedwith{\epsilon }_r=3.9(assumed)and{h}_{ox}=\\ 320\mathrm{nm}:c=2.21,1.105,0.789and0.553\\ pF/mmfor5,10,14and20\mathrm{nm};theprinted\\ 1.25pF/mmcorrespondsto8.8\mathrm{nm}orto{\epsilon }_r\\ =4.4;Q_{\pi }=1.25x15.3=19.1\mathrm{pC},3.1\\ timesthe6.21\mathrm{pC}oftheforward-biased\\ diodeonthepreviouspage)\end{array}$

Efficiency and Loss

Name	Formula	Related Formulae	Variables/Constants
Voltage-length product against oxide thickness	$V_{\pi }L\approx k_t{t}_{ox}$ $k_t=\frac{V_{\pi }L}{t_{ox}}$	$V_{\pi }L=\frac{\lambda }{2\left(d\Delta n_{eff}/dV\right)}$	$\begin{array}{r}{k}_t:slopeinVcmpernm,d\Delta n_{eff}/dV:\\ changeoftheeffectiveindexpervolt,\\ Debnathetal.:simulated2.40\mathrm{V}\mathrm{cm}(20\\ \mathrm{nm}),about1\mathrm{V}\mathrm{cm}(10\mathrm{nm})and0.53\mathrm{V}\mathrm{cm}(5\\ \mathrm{nm})for1mm,measured1.53\mathrm{V}\mathrm{cm}at6V,\\ Hirakietal.:0.09\mathrm{V}\mathrm{cm}fora250\mu \mathrm{m}\\ InGaAsP/SiMOSshifterinaccumulation,\\ Wattsetal.:aMOS-capacitorMach-Zehnder\\ atabout3.3\mathrm{V}\mathrm{cm}cited,injectiondevices\\ onthepreviouspage:0.036to0.24\mathrm{V}\mathrm{mm},\\ depletiononpage99:1.4to3.1\mathrm{V}\mathrm{cm}\end{array}$ $\begin{array}{r}(computed:k_t=0.106,0.100and0.120V\\ cmpernmfor5,10and20\mathrm{nm},so{V}_{\pi }Lis\\ closetoproportionalto{t}_{ox}(apowerof\\ 1.09between5and20\mathrm{nm});themeasured\\ 1.53\mathrm{V}\mathrm{cm}thencorrespondsto14.4\mathrm{nm},\\ whichagreeswiththe14\mathrm{nm}extractedby\\ theauthors)\end{array}$
Phase against voltage in accumulation	$\Delta \phi =\pi \frac{VL}{V_{\pi }L}$	$V_{\pi }=\frac{V_{\pi }L}{L}$	$V:appliedvoltage$ $L:length$ $\begin{array}{r}{V}_{\pi }:voltagefor\pi ,accumulationgivesa\\ phasethatisnearlylinearinvoltage\\ (Debnathetal.),simulatedphaseshift\\ for1mmover0to4V:0.5rad(20\mathrm{nm})to\\ 2.3rad(5\mathrm{nm}),thephaseofthemeasured\\ devicewasfoundfromthespectralshift\\ dividedbythefreespectralrangeofthe\\ interferometer(2.6nm,armmismatch200\\ \mu \mathrm{m})\end{array}$ $\begin{array}{r}(computed:0.5radover1mmat2.40\mathrm{V}\mathrm{cm}\\ needs3.82V,and2.3radat0.53\mathrm{V}\mathrm{cm}\\ needs3.88V,sobothfitthestated4V\\ range;forthemeasureddevice{V}_{\pi }=\\ 1.53/0.05=30.6Vfor500\mu \mathrm{m};Hirakiet\\ al.:V_{\pi }=0.09/0.025=3.6Vfor250\mu \mathrm{m})\end{array}$
Loss of the phase shifter and loss-efficiency product	${\alpha }_{ps}={\alpha }_{undoped}+{\alpha }_{dop}$ $\alpha V_{\pi }L$	$A_{\pi }={\alpha }_{ps}{L}_{\pi }={\alpha }_{ps}\frac{V_{\pi }L}{V}$	${\alpha }_{ps}:lossofthephaseshifterindB/mm$ $\begin{array}{r}{A}_{\pi }:lossoverthelengthofa\pi shiftat\\ thedrivevoltageV,Debnathetal.:5.1\\ dB/mmwithdoping,1.7dB/mmundoped,\\ doping-inducedabout3.4dB/mm,2.5dBfor\\ 500\mu \mathrm{m},passivestructureabout23.5dB,\\ totalabout26dBatthetransmission\\ peak,rib-to-slottransitions5.5dBeach\\ measuredagainstunder1dBsimulated,Liu\\ etal.:about6.7dBonchip,mostlyfrom\\ polysilicon(upto5dBlesswith\\ single-crystalsilicon),Hirakietal.:\\ insertionlossabout1.0dBfor250\mu \mathrm{m}\\ (takenasthelossoftheshifter,my\\ reading)\end{array}$ $\begin{array}{r}(computed:5.1-1.7=3.4dB/mmand5.1x\\ 0.5=2.55dB,inlinewiththeprinted\\ 2.5dB;2.5+23.5=26dB;Debnathetal.\\ \alpha V_{\pi }L=5.1x15.3=78VdBand{A}_{\pi }=13\\ dBat6V(L_{\pi }=2.55mm);Hirakietal.\\ 1.0/0.025=40dB/cmand40x0.09=3.6V\\ dB;forcomparisondepletion29to33VdB\\ (page99)andinjection0.73(static)to\\ 9.5VdB(page101))\end{array}$

Speed and Equalisation

Name	Formula	Related Formulae	Variables/Constants
RC bandwidth of the capacitor	$f_{RC}=\frac{1}{2\pi \left(R_s+R_c+R_{dr}\right)C_{ox}}$	$C_{ox}=cL$	$R_s:seriesresistanceofthedopedsilicon$ $R_c:contactresistance$ $R_{dr}:driverresistance$ $\begin{array}{r}{C}_{ox}:capacitanceoftheshifter,thepaper\\ ofDebnathetal.givesnoRCformulaand\\ saysonlythatalargerRCproductlowers\\ thebandwidth(theformulaisbackground\\ knowledge),Debnathetal.:simulated52\\ GHz(20\mathrm{nm},0to4V),32GHz(10\mathrm{nm}),20\\ GHz(5\mathrm{nm})at1\times 10^{18}\mathrm{c}{\mathrm{m}}^{-3},42GHzpredicted\\ forthedevice,afurther11\Omega ofcontact\\ resistancenotincluded,openeyesupto\\ 25Gbit/s,Hirakietal.:about2.2GHz\\ cut-offindepletionmode,Liuetal.:\\ morethan1GHz,Wattsetal.:morethan\\ 20GHzcitedforMOS\end{array}$ $\begin{array}{r}(computed:for500\mu \mathrm{m}at1.25pF/mm(0.625\\ \mathrm{pF})the11\Omega alonelimitsthebandwidthto\\ 23.1GHz,and42or32GHzneedsatotal\\ resistanceof6.1or8.0\Omega ;thesimulated\\ bandwidthfallsas{t}_{ox}tothepower0.70\\ (52to32GHzfor20to10\mathrm{nm})and0.68\\ (32to20GHzfor10to5\mathrm{nm}),thatis\\ lessthantheinverseproportionalityof\\ thecapacitance)\end{array}$
Equalisation boost for a low-bandwidth modulator	$G\left(f\right)=\sqrt{1+{\left(\frac{f}{f_c}\right)}^2}$	$G\left[\mathrm{dB}\right]=20{\log }_{10}G$	$\begin{array}{r}f:signalfrequency(forNRZtheNyquist\\ frequencyishalfthebitrate)\end{array}$ $\begin{array}{r}{f}_c:3dBcut-offofasingle-poleresponse\\ (backgroundknowledge),Hirakietal.:32\\ Gbit/swithpre-emphasisforacut-offof\\ about2.2GHzindepletionmode,Debnath\\ etal.:25Gbit/seyewith6V\\ peak-to-peakand3Vbiasandnoequaliser\\ mentionedinthesummary\end{array}$ $\begin{array}{r}(computed:attheNyquistfrequencyof16\\ GHztheboostis7.3(17.3dB)for2.2\\ GHz;Debnathetal.at12.5GHzwithan\\ assumedcut-offof23.1GHz(fromthe11\Omega \\ limit)needonly1.14(1.1dB))\end{array}$

Modulation Depth, Energy and Interferometer

Name	Formula	Related Formulae	Variables/Constants
Extinction ratio of a limited swing	$ER=\frac{1+\sin \left(\Delta {\phi }_{pp}/2\right)}{1-\sin \left(\Delta {\phi }_{pp}/2\right)},\Delta {\phi }_{pp}=\pi \frac{V_{pp}L}{V_{\pi }L}$	$V_{\pi }L=\frac{\pi V_{pp}L}{\Delta {\phi }_{pp}}$	$\begin{array}{r}asonpage99:quadraturebias,aphase\\ linearinvoltage,losslesssplitters\\ (backgroundknowledge),Debnathetal.:6\\ Vpeak-to-peakwith3Vdcbias,500\mu \mathrm{m},\\ modulatedextinctionratio3.7dBat20\\ Gbit/sand3.6dBat25Gbit/s(3.65dBin\\ theabstractandconclusion),the\\ interferometeritselfabout20dB\end{array}$ $\begin{array}{r}(computed:withthemeasured1.53\mathrm{V}\mathrm{cm}the\\ ratiowouldbe2.72dB;themeasured3.65\\ dBneeds{V}_{\pi }L=1.15\mathrm{V}\mathrm{cm},whichisclose\\ tothesimulated1\mathrm{V}\mathrm{cm}for10\mathrm{nm}andnot\\ to1.53)\end{array}$
Dynamic energy per bit of the capacitor	$E_{bit}=\frac{1}{4}{C}_{ox}{V}_{pp}^2$	$I_{pk}\approx C_{ox}\frac{\Delta V}{t_r}$	$C_{ox}:capacitance$ $V_{pp}:peak-to-peakswing$ $\begin{array}{r}{t}_r:risetime,thefactor1/4followsthe\\ GermaniumandSilicon-Germanium\\ ElectroabsorptionModulatorpage,Debnath\\ etal.andHirakietal.reportnoenergy\\ perbit,thepatentstatesastaticpower\\ ofsubstantiallyzero(acapacitorpasses\\ nodccurrent)andgivesgatetransient\\ currentsofabout10mA(accumulation,\\ gateswungbetween0.3and0.7Vat1\\ Gbit/s)andabout25mA(depletion)\end{array}$ $\begin{array}{r}(computedforDebnathetal.with0.625\mathrm{pF}\\ (1.25pF/mmx0.5mm)and6V:5.6pJ/bit,\\ or5.0pJ/bitwiththe1.105pF/mmofthe\\ oxideformula;thisisanestimate,nota\\ reportedvalue,andis5timesthe1.08pJ\\ perjunctionofthedepletiondevice(page\\ 99))\end{array}$
Group index from the arm mismatch	$FSR=\frac{{\lambda }^2}{n_g\Delta L}$	$n_g=\frac{{\lambda }^2}{FSR\cdot \Delta L}$	$\Delta L:lengthdifferenceofthetwoarms$ $\begin{array}{r}FSR:freespectralrangeoftheunbalanced\\ Mach-Zehnder\end{array}$ $\begin{array}{r}{n}_g:groupindex,Debnathetal.:\Delta L=200\\ \mu \mathrm{m},FSR=2.6nm,wavelength1558.8nm,\\ tuningrange1530to1630nm,thegroup\\ indexisnotprinted(theformulais\\ backgroundknowledge)\end{array}$ $\begin{array}{r}(computed:n_g=4.67,intherange\\ expectedforaribguideofthissize\\ (backgroundknowledge))\end{array}$

Important Questions

Ques: Is the oxide thickness of the lateral MOS modulator 10 nm, 14 nm or 8.8 nm?

Debnath et al. choose 10 $\mathrm{nm}$ as the design value, but the measured $V_{\pi }L$ of 1.53 $\mathrm{V}\mathrm{cm}$ corresponds to a 14 $\mathrm{nm}$ slot according to the authors, which I reproduce: with $V_{\pi }L$ proportional to $t_{ox}$ (0.53 $\mathrm{V}\mathrm{cm}$ at 5 $\mathrm{nm}$) it gives 14.4 $\mathrm{nm}$ (computed). The printed capacitance of 1.25 $pF/mm$ corresponds to 8.8 $\mathrm{nm}$ for ${\epsilon }_r=3.9$ and a height of 320 $\mathrm{nm}$, or to ${\epsilon }_r=4.4$ at 10 $\mathrm{nm}$ (computed). These three values cannot all hold. A thicker slot lowers the capacitance (0.79 $pF/mm$ at 14 $\mathrm{nm}$, computed), so the capacitance printed seems to belong to the design, and I regard 14 $\mathrm{nm}$ as the more likely oxide of the measured device, since the efficiency is the measured quantity (my reading). Reference: Debnath, Thomson, Zhang, Khokhar, Littlejohns, Byers, Mastronardi, Husain, Ibukuro, Gardes, Reed and Saito, ‘All-silicon carrier accumulation modulator based on a lateral metal-oxide-semiconductor capacitor’, Photonics Research 6(5), 373 (2018) (researching.cn page and the Southampton eprint 419332, read through fetch-tool summaries; the summaries differ in details, see the audit).

Ques: Is the voltage-length product 0.09, 1, 1.53 or 3.3 V cm?

They belong to four situations. Debnath et al. simulate about 1 $\mathrm{V}\mathrm{cm}$ for 10 $\mathrm{nm}$ and measure 1.53 $\mathrm{V}\mathrm{cm}$ at 6 V, with a lower actual doping ($6\times 10^{17}$ against $1\times 10^{18}$ $\mathrm{c}{\mathrm{m}}^{-3}$) and a thicker slot. Hiraki et al. get 0.09 $\mathrm{V}\mathrm{cm}$ in accumulation with an InGaAsP layer, 17 times lower than 1.53 (computed). Watts et al. cite about 3.3 $\mathrm{V}\mathrm{cm}$ for a MOS Mach-Zehnder, 2.2 times higher than 1.53 (computed). The spread follows the oxide thickness ($V_{\pi }L$ proportional to $t_{ox}$), the semiconductor (the electron mass) and the bias. For an all-silicon device I treat 1 to 1.5 $\mathrm{V}\mathrm{cm}$ as the realistic range and 0.09 $\mathrm{V}\mathrm{cm}$ as the III-V value. Reference: Debnath, Thomson, Zhang, Khokhar, Littlejohns, Byers, Mastronardi, Husain, Ibukuro, Gardes, Reed and Saito, ‘All-silicon carrier accumulation modulator based on a lateral metal-oxide-semiconductor capacitor’, Photonics Research 6(5), 373 (2018) (researching.cn page and the Southampton eprint 419332, read through fetch-tool summaries; the summaries differ in details, see the audit); Hiraki, Aihara, Hasebe, Takeda, Fujii, Kakitsuka, Tsuchizawa, Fukuda and Matsuo, ‘Heterogeneously integrated III-V/Si MOS capacitor Mach-Zehnder modulator’, Nature Photonics 11, 482-485 (2017) (springer.com page, abstract only, read through a fetch-tool summary); Watts et al., IEEE JSTQE (2010) (MIT file; a depletion-mode device, used only for its comparison statements on MOS-capacitor modulators).

Ques: Why is the modulated extinction ratio of $3.65\mathrm{dB}$ higher than the measured V_πL predicts?

For 500 $\mu \mathrm{m}$, 6 V peak-to-peak and the measured 1.53 $\mathrm{V}\mathrm{cm}$ the phase swing is $0.196\pi$ and the extinction ratio at quadrature is $2.72\mathrm{dB}$ (computed). The paper reports $3.7\mathrm{dB}$ at 20 Gbit/s and $3.6\mathrm{dB}$ at 25 Gbit/s. To obtain $3.65\mathrm{dB}$ the device needs $V_{\pi }L=1.15$ $\mathrm{V}\mathrm{cm}$ (computed), close to the simulated 1 $\mathrm{V}\mathrm{cm}$ for 10 $\mathrm{nm}$. The summary gives $V_{\pi }L$ = 1.53 $\mathrm{V}\mathrm{cm}$ ‘at 6 V’ without saying how it was extracted; if it was taken over a different bias range than the data swing (my reading), the efficiency under the data signal may differ. The reported ratio is therefore more likely right than my $2.72\mathrm{dB}$, which assumes a linear phase. Reference: Debnath, Thomson, Zhang, Khokhar, Littlejohns, Byers, Mastronardi, Husain, Ibukuro, Gardes, Reed and Saito, ‘All-silicon carrier accumulation modulator based on a lateral metal-oxide-semiconductor capacitor’, Photonics Research 6(5), 373 (2018) (researching.cn page and the Southampton eprint 419332, read through fetch-tool summaries; the summaries differ in details, see the audit).

Ques: Is the bandwidth 32, 42 or 52 GHz, and why did the measurement fall short?

These are simulations for different oxides: 52 GHz (20 $\mathrm{nm}$), 32 GHz (10 $\mathrm{nm}$), 20 GHz (5 $\mathrm{nm}$), and 42 GHz was predicted for the fabricated device; the measured bandwidth was lower, and the summary gives no number, only open eyes up to 25 Gbit/s. The authors name an additional contact resistance of 11 $\Omega$ that was not in the simulation. With 0.625 $\mathrm{pF}$ (computed from 1.25 $pF/mm$) this alone limits the bandwidth to 23.1 GHz (computed), and the predicted 42 GHz needed only 6.1 $\Omega$ in total (computed). So the contacts explain a bandwidth of about 23 GHz, enough for a 25 Gbit/s eye (Nyquist 12.5 GHz). I regard 20 to 25 GHz as the most likely actual figure (my reading). Reference: Debnath, Thomson, Zhang, Khokhar, Littlejohns, Byers, Mastronardi, Husain, Ibukuro, Gardes, Reed and Saito, ‘All-silicon carrier accumulation modulator based on a lateral metal-oxide-semiconductor capacitor’, Photonics Research 6(5), 373 (2018) (researching.cn page and the Southampton eprint 419332, read through fetch-tool summaries; the summaries differ in details, see the audit).

Ques: Does the hybrid III-V/Si device have a 2.2 GHz bandwidth or 32 Gbit/s capability?

Both are reported by Hiraki et al., but the 2.2 GHz is stated for depletion mode, and the 0.09 $\mathrm{V}\mathrm{cm}$ for accumulation, so the two numbers describe different operating modes (my reading of the abstract). A 32 Gbit/s NRZ signal has a Nyquist frequency of 16 GHz, 7.3 times the cut-off, so the pre-emphasis must boost the signal by 7.3, or $17.3\mathrm{dB}$ (computed), which is why the abstract mentions pre-emphasis. For a device of 250 $\mu \mathrm{m}$ with $V_{\pi }=3.6$ V (computed) the boost makes the drive large. I cannot tell from the abstract whether the accumulation bandwidth is higher, and I do not combine the two values. Reference: Hiraki, Aihara, Hasebe, Takeda, Fujii, Kakitsuka, Tsuchizawa, Fukuda and Matsuo, ‘Heterogeneously integrated III-V/Si MOS capacitor Mach-Zehnder modulator’, Nature Photonics 11, 482-485 (2017) (springer.com page, abstract only, read through a fetch-tool summary).

Ques: Why is the insertion loss $26\mathrm{dB}$ for one device and $1\mathrm{dB}$ for another?

The $26\mathrm{dB}$ of Debnath et al. is the whole test structure: $23.5\mathrm{dB}$ passive and $2.5\mathrm{dB}$ in the 500 $\mu \mathrm{m}$ phase shifter (computed $2.55\mathrm{dB}$ from 5.1 $dB/mm$). The rib-to-slot transitions cost $5.5\mathrm{dB}$ each in the measurement against under $1\mathrm{dB}$ simulated, so they dominate. Hiraki et al. quote about $1.0\mathrm{dB}$, which I take as the loss of the 250 $\mu \mathrm{m}$ shifter (my reading, the abstract does not say). Liu et al. had $6.7\mathrm{dB}$, mostly from polysilicon. The shifter loss per $\pi$ is $13\mathrm{dB}$ for Debnath et al. (computed, at 6 V) and about $1\mathrm{dB}$ for Hiraki et al. (computed), so the hybrid shifter is 13 times better in loss per $\pi$. Reference: Debnath, Thomson, Zhang, Khokhar, Littlejohns, Byers, Mastronardi, Husain, Ibukuro, Gardes, Reed and Saito, ‘All-silicon carrier accumulation modulator based on a lateral metal-oxide-semiconductor capacitor’, Photonics Research 6(5), 373 (2018) (researching.cn page and the Southampton eprint 419332, read through fetch-tool summaries; the summaries differ in details, see the audit); Hiraki, Aihara, Hasebe, Takeda, Fujii, Kakitsuka, Tsuchizawa, Fukuda and Matsuo, ‘Heterogeneously integrated III-V/Si MOS capacitor Mach-Zehnder modulator’, Nature Photonics 11, 482-485 (2017) (springer.com page, abstract only, read through a fetch-tool summary); the first silicon MOS-capacitor phase modulator, Nature 427, 615 (2004) (abstract at ideas.repec.org and a Laser Focus World article, both read through fetch-tool summaries; authors and the device details beyond the news article not checked).

Ques: How does the MOS capacitor compare in loss-efficiency product?

The product $\alpha V_{\pi }L$ in $\mathrm{V}\mathrm{dB}$ is the fair measure because both terms trade against each other. Debnath et al.: 5.1 $dB/mm$ times 15.3 $\mathrm{V}\mathrm{mm}$ = 78 (computed). Hiraki et al.: 40 $dB/cm$ times 0.09 $\mathrm{V}\mathrm{cm}$ = 3.6 (computed, using my reading of the loss). Depletion on page 99: 29 to 33. Injection on page 101: 0.73 static and 9.5 at 12.5 GHz. So the all-silicon MOS device is the worst of the group, because the doping next to a thin oxide is heavy (3.4 $dB/mm$), while the hybrid is better than depletion by 8 to 9 times (computed). Part of the 78 is the undoped 1.7 $dB/mm$, and the transitions are not included. Reference: Debnath, Thomson, Zhang, Khokhar, Littlejohns, Byers, Mastronardi, Husain, Ibukuro, Gardes, Reed and Saito, ‘All-silicon carrier accumulation modulator based on a lateral metal-oxide-semiconductor capacitor’, Photonics Research 6(5), 373 (2018) (researching.cn page and the Southampton eprint 419332, read through fetch-tool summaries; the summaries differ in details, see the audit); Hiraki, Aihara, Hasebe, Takeda, Fujii, Kakitsuka, Tsuchizawa, Fukuda and Matsuo, ‘Heterogeneously integrated III-V/Si MOS capacitor Mach-Zehnder modulator’, Nature Photonics 11, 482-485 (2017) (springer.com page, abstract only, read through a fetch-tool summary); Silicon Carrier-Depletion Mach-Zehnder Modulator page of this vault; Silicon Carrier-Injection PIN Modulator page of this vault.

Ques: What is the energy per bit of a MOS-capacitor modulator?

No source reports it. Debnath et al. and Hiraki et al. give none, and the patent says the static power is substantially zero. A capacitor passes no dc current, so the energy is $\frac{1}{4}C{V}_{pp}^2$. With 0.625 $\mathrm{pF}$ and 6 V I compute 5.6 pJ/bit, or 5.0 pJ/bit with the oxide formula’s 1.105 $pF/mm$ (computed, an estimate and not a measurement). This is about 5 times the 1.08 pJ per junction of the depletion device (page 99) and close to the 5.3 pJ per $\pi$ of the injection diode (page 101), but with no holding power. Hiraki et al. at 3.6 V and 250 $\mu \mathrm{m}$ should need less, but their capacitance is not given. Reference: Debnath, Thomson, Zhang, Khokhar, Littlejohns, Byers, Mastronardi, Husain, Ibukuro, Gardes, Reed and Saito, ‘All-silicon carrier accumulation modulator based on a lateral metal-oxide-semiconductor capacitor’, Photonics Research 6(5), 373 (2018) (researching.cn page and the Southampton eprint 419332, read through fetch-tool summaries; the summaries differ in details, see the audit); US patent 6845198, ‘High-speed silicon-based electro-optic modulator’ (the silicon-insulator-silicon capacitor, SISCAP; patent text read through a fetch-tool summary of its first 100000 characters); Silicon Carrier-Depletion Mach-Zehnder Modulator page of this vault; Silicon Carrier-Injection PIN Modulator page of this vault.

Ques: Which gate oxide range is right: 3 to 20 nm, 5 to 20 nm or 12 nm?

The sources define different things. The patent simulates 30, 80 and 200 angstrom (3, 8 and 20 $\mathrm{nm}$) and claims at most 1000 angstrom, preferably 200 angstrom; Debnath et al. simulate 5 to 20 $\mathrm{nm}$ and build 10 to 14 $\mathrm{nm}$; Liu et al. used about 12 $\mathrm{nm}$. They agree on the range of 3 to 20 $\mathrm{nm}$ for a useful device. The patent says a thicker oxide reduces the carrier change but shortens the transition time between the states, and the computed bandwidth does rise with the thickness (52 GHz at 20 $\mathrm{nm}$, 20 GHz at 5 $\mathrm{nm}$), so the range is a design trade between efficiency and speed. I take 5 to 15 $\mathrm{nm}$ as the practical range. Reference: US patent 6845198, ‘High-speed silicon-based electro-optic modulator’ (the silicon-insulator-silicon capacitor, SISCAP; patent text read through a fetch-tool summary of its first 100000 characters); Debnath, Thomson, Zhang, Khokhar, Littlejohns, Byers, Mastronardi, Husain, Ibukuro, Gardes, Reed and Saito, ‘All-silicon carrier accumulation modulator based on a lateral metal-oxide-semiconductor capacitor’, Photonics Research 6(5), 373 (2018) (researching.cn page and the Southampton eprint 419332, read through fetch-tool summaries; the summaries differ in details, see the audit); the first silicon MOS-capacitor phase modulator, Nature 427, 615 (2004) (abstract at ideas.repec.org and a Laser Focus World article, both read through fetch-tool summaries; authors and the device details beyond the news article not checked).

Ques: How much faster is the 2018 device than the first MOS modulator?

Liu et al. demonstrated a 1 Gbit/s signal with a bandwidth above 1 GHz in a 2.5 mm shifter and a 3.5 V pulse on 3 V bias, and the previous silicon record was about 20 MHz. Debnath et al. show open eyes up to 25 Gbit/s with a 500 $\mu \mathrm{m}$ shifter and 6 V peak-to-peak, that is 25 times the rate and one fifth of the length (computed). The thinner oxide, the lateral geometry and the contact design account for the change, but I cannot separate them from the summaries. The 2004 device’s $V_{\pi }L$ is not in the sources I read; the 2.5 mm length and a 3.5 V swing suggest a value of several $\mathrm{V}\mathrm{cm}$ (my estimate, not computed), in line with the 3.3 $\mathrm{V}\mathrm{cm}$ that Watts et al. cite. Reference: the first silicon MOS-capacitor phase modulator, Nature 427, 615 (2004) (abstract at ideas.repec.org and a Laser Focus World article, both read through fetch-tool summaries; authors and the device details beyond the news article not checked); Debnath, Thomson, Zhang, Khokhar, Littlejohns, Byers, Mastronardi, Husain, Ibukuro, Gardes, Reed and Saito, ‘All-silicon carrier accumulation modulator based on a lateral metal-oxide-semiconductor capacitor’, Photonics Research 6(5), 373 (2018) (researching.cn page and the Southampton eprint 419332, read through fetch-tool summaries; the summaries differ in details, see the audit); Watts et al., IEEE JSTQE (2010) (MIT file; a depletion-mode device, used only for its comparison statements on MOS-capacitor modulators).

Ques: Why would a III-V layer give a larger index change per carrier than silicon?

The Drude relation of the patent gives $\Delta n\propto \Delta N/m^{\ast }$. With the conductivity mass of silicon electrons, 0.26 $m_0$, I compute $-1.19\times 10^{-3}$ for $1\times 10^{18}$ $\mathrm{c}{\mathrm{m}}^{-3}$ (1.35 times the Soref-Bennett value of $-8.8\times 10^{-4}$), and with an assumed mass of 0.05 $m_0$ for a III-V alloy (my assumption) $-6.2\times 10^{-3}$, 5.2 times larger (computed). The abstract of Hiraki et al. says the same in words, and adds a high electron mobility and a low plasma absorption, which explain the 0.09 $\mathrm{V}\mathrm{cm}$ at $1.0\mathrm{dB}$. The Drude form underestimates holes (computed $-7.9\times 10^{-4}$ against the fit of page 99), so it is only a guide, and the real III-V stack also has a different oxide and capacitance. Reference: US patent 6845198, ‘High-speed silicon-based electro-optic modulator’ (the silicon-insulator-silicon capacitor, SISCAP; patent text read through a fetch-tool summary of its first 100000 characters); Hiraki, Aihara, Hasebe, Takeda, Fujii, Kakitsuka, Tsuchizawa, Fukuda and Matsuo, ‘Heterogeneously integrated III-V/Si MOS capacitor Mach-Zehnder modulator’, Nature Photonics 11, 482-485 (2017) (springer.com page, abstract only, read through a fetch-tool summary); Silicon Carrier-Depletion Mach-Zehnder Modulator page of this vault.

Related pages in this vault: Silicon Carrier-Injection PIN Modulator, Silicon Carrier-Depletion Mach-Zehnder Modulator, Silicon Microring Modulator, Thermo-Optic Modulator, Directly Modulated Laser, Silicon-Compatible Lasers (Hybrid III-V, Epitaxial Quantum-Dot and Ge-GeSn), MOS Capacitor.