Triode for Alternating Current (TRIAC)

1. Theory

• Definition: A TRIAC is a bidirectional thyristor: one integrated five-layer structure that behaves as two SCRs in antiparallel between main terminals MT1 and MT2, sharing a single gate next to MT1.
• Thyristor physics per polarity: Each direction latches by the SCR’s regenerative condition, ${\alpha }_1+{\alpha }_2=1$ (or ${\alpha }_1^{\prime }+{\alpha }_2^{\prime }=1$ for the reverse direction).
• Single gate: Unlike discrete antiparallel SCRs, one gate referenced to MT1 can trigger conduction in either direction.
• Four trigger quadrants: Defined by the polarity of MT2 and the gate relative to MT1; Quadrants I–III are sensitive, while Quadrant IV needs the most gate current.
• Stored charge: Charge left after conduction in one direction can act as gate current for the other direction, which limits commutation.

2. Working Principle

• Blocking: Without a gate signal, the device blocks voltage of either polarity up to its breakover rating.
• Triggering: A gate pulse of either polarity latches the half of the structure that matches the MT2 polarity.
• Natural commutation: The device turns off only when the AC current crosses zero and falls below the holding current.
• Phase control: Firing at an angle ${\alpha }_f$ in each half-cycle sets the conduction angle ($\pi -{\alpha }_f$) and so the RMS load voltage and power.
• Commutation limits: The commutating $di/dt$ and $dV/dt$ ratings are much lower than the static ones; inductive loads make re-triggering more likely.
• Line-frequency only: These commutation limits restrict TRIACs to 50/60 Hz mains switching.

3. Applications

• Phase-control dimmers: Incandescent and dimmable-LED lamp dimmers on mains.
• Universal-motor speed control: Power tools, mixers and vacuum cleaners.
• AC on/off switching: Solid-state relays and appliance switching for heaters, pumps and fans at low to medium power.

Name	Formula	Related Formulae	Variables/Constants
Latching conditions (one per polarity)	${\alpha }_1+{\alpha }_2=1(V_{MT2}>0)$ ${\alpha }_1^{\prime }+{\alpha }_2^{\prime }=1(V_{MT2}<0)$	$I_{MT2}=\frac{{\alpha }_2{I}_G+I_{CBO1}+I_{CBO2}}{1-({\alpha }_1+{\alpha }_2)}\text{(see Thyristor SCR page)}$	$\begin{array}{r}{\alpha }_1,{\alpha }_2:gainsofthePNP/NPN\\ pairformingtheforwardthyristor\end{array}$ $\begin{array}{r}{\alpha }_1^{\prime },{\alpha }_2^{\prime }:gainsofthe\\ complementarypairformingthereverse\\ (antiparallel)thyristor\end{array}$ $I_G:gatecurrent$
Firing angle and conduction angle	${\alpha }_f=\omega t_f=2\pi f{t}_f,{\beta }_c=\pi -{\alpha }_f$		$\begin{array}{r}{\alpha }_f:firing(delay)anglemeasured\\ fromthezerocrossingoftheAC\\ voltage\end{array}$ $\begin{array}{r}{t}_f:delaybetweenthezerocrossingand\\ thegatetriggerpulse\end{array}$ ${\beta }_c:conductionangleperhalfcycle$ $f:linefrequency$
RMS load voltage (phase control)	$V_{rms}=V_m\sqrt{\frac{1}{2}-\frac{{\alpha }_f}{2\pi }+\frac{\sin 2{\alpha }_f}{4\pi }}$	$V_{rms}({\alpha }_f=0)=\frac{V_m}{\sqrt{2}}$	$V_{rms}:RMSvoltageacrosstheload$ $V_m:peakoftheACsupplyvoltage$
Load power and RMS current (resistive load)	$P_L=\frac{V_{rms}^2}{R_L}$	$I_{T(RMS)}=\frac{V_{rms}}{R_L}$	$P_L:averagepowerdeliveredtotheload$ $R_L:loadresistance$ $\begin{array}{r}{I}_{T(RMS)}:RMSon-statecurrent\\ thedevicemustberatedfor\end{array}$
Commutating current slope	${\left(\frac{di}{dt}\right)}_c=2\pi f\sqrt{2}{I}_{T(RMS)}$	$Q_s=\tau I_T\text{(see PN Junction Diode / PIN Diode pages)}$	$\begin{array}{r}{\left(\frac{di}{dt}\right)}_c:rateoffall\\ ofon-statecurrentatthezero\\ crossing(sinusoidalcurrent)\end{array}$ $\begin{array}{r}{Q}_s:minoritychargeleftinthedevice\\ whenthecurrentreverses\end{array}$
Critical rate of voltage rise (static and commutating)	$i_{disp}=C_{J2}\frac{dV}{dt}$	${\left(\frac{dV}{dt}\right)}_{crit}\approx \frac{I_{G,trig}}{C_{J2}}\text{(see Thyristor SCR page)}$	$\begin{array}{r}{\left(\frac{dV}{dt}\right)}_c:commutating\\ dv/dtrating,theallowedvoltagerise\\ rightafterthedevicehasbeencarrying\\ current(muchlowerthanthestatic\\ ratingbecauseof{Q}_s)\end{array}$
Blocking voltage (each polarity)	$V_{DRM},V_{RRM}\lesssim B{V}_{J2}\approx \frac{{\epsilon }_s{E}_{crit}^2}{2q{N}_D}$	$\text{(see Thyristor SCR / Avalanche Diode pages)}$	$\begin{array}{r}{V}_{DRM},V_{RRM}:repetitivepeak\\ off-statevoltagesinthetwo\\ directions\end{array}$ $N_D:dopingofthelightlydopedblockingbase$

Important Questions

Ques: Why is a TRIAC not simply two SCRs wired in antiparallel, and what are the four trigger quadrants?

Discrete antiparallel SCRs need two separate gate drives, because each gate is referenced to its own cathode. In a TRIAC the two thyristors are merged into a single five-layer structure so that one gate terminal, adjacent to MT1, can trigger conduction in either direction. The four trigger modes are labeled by the polarity of MT2 and gate relative to MT1: Quadrant I (MT2+, G+), Quadrant II (MT2+, G−), Quadrant III (MT2−, G−) and Quadrant IV (MT2−, G+). Gate current in Quadrants I, II and III turns on the nearby junction structure directly and these modes are the most sensitive; Quadrant IV must inject carriers through the remote part of the structure, so it needs the largest gate current and is the least sensitive, which is why many applications are designed to avoid it (for example by using a negative gate pulse with both polarities of MT2). Reference: S.M. Sze and Kwok K. Ng, Physics of Semiconductor Devices, 3rd ed., Wiley, 2007.

Ques: Why are a TRIAC’s commutation ratings so much weaker than an SCR’s, and why does an inductive load make it worse?

When the on-state current in one direction falls to zero, the device still contains stored minority charge $Q_s$ from conduction. In an SCR the opposite polarity is simply a reverse-blocking junction, but in a TRIAC the other half of the structure is also an active thyristor, so any residual charge can act like gate current for conduction in the opposite direction, and a quick voltage rise ($dV/dt$) right after the current zero can retrigger it. With a resistive load, current and voltage cross zero together, so the voltage at turn-off is tiny. With an inductive load the current lags the voltage, so when the current reaches zero the supply voltage is already large, demanding an immediate, steep voltage rise across the device. This is why the TRIAC has separate commutating $(di/dt{)}_c$ and $(dV/dt{)}_c$ ratings that are much lower than static ratings, and why TRIACs are generally limited to line-frequency (50/60 Hz) applications where $(di/dt{)}_c=2\pi f\sqrt{2}{I}_{T(RMS)}$ stays small. Reference: S.M. Sze and Kwok K. Ng, Physics of Semiconductor Devices, 3rd ed., Wiley, 2007.

Ques: How does phase control actually regulate power, and what does the $V_{rms}$ formula show?

A TRIAC cannot turn itself off before the current crosses zero, but it can be fired late in each half cycle. The firing angle ${\alpha }_f$ sets how much of each half cycle the load sees: $V_{rms}$ falls from $V_m/\sqrt{2}$ at ${\alpha }_f=0$ (full conduction) to zero at ${\alpha }_f=\pi$. A useful check is ${\alpha }_f=\pi /2$, where the formula gives $V_{rms}^2=V_m^2/4$, exactly half the full-conduction power $V_m^2/(2R_L)$ for a resistive load. Because the device is switched rather than dropping voltage linearly, there is little heat in the TRIAC itself, which is the advantage over a series resistor; the cost is abrupt current steps that create harmonic content and a lagging effective power factor on the supply. Reference: S.M. Sze and Kwok K. Ng, Physics of Semiconductor Devices, 3rd ed., Wiley, 2007; N. Mohan, T.M. Undeland, and W.P. Robbins, Power Electronics, 3rd ed., Wiley, 2003.

Related pages in this vault: Thyristor (SCR), Diode for Alternating Current (DIAC), Integrated Gate-Commutated Thyristor (IGCT), Silicon Controlled Switch (SCS), Gate Turn Off (GTO), PIN Diode, PN Junction, Silicon Power MOSFET, IGBT and Thyristors, Power Device Compact Models.