1. Theory

Definition: Charge and capacitance modelling assigns the charge stored in a MOSFET to its four terminals as functions of the terminal voltages, and derives all capacitances as derivatives of these charges, so that transient simulation conserves charge (Ward and Dutton; Kundert-style chapter).
Charge conservation: Models that define capacitances directly, such as Meyer’s, have no underlying charge functions, so charge is not conserved and errors accumulate over each time step (Kundert-style chapter; Ward and Dutton).
Partitioning: The channel charge must be divided between source and drain, which is not fixed by physics in quasi-static operation; schemes such as 50/50 and 40/60 are used (Ward and Dutton; background knowledge for 40/60).
Nonreciprocity: Derivatives of charges give a matrix of transcapacitances in which, in general, $C_{x y} \neq = C_{y x}$ , for example $C_{D G} \neq = C_{G D}$ in saturation (Ward and Dutton; UBC ELEC 577).
Extrinsic parts: Overlap, fringe and junction capacitances add to the intrinsic terms and dominate in short devices (Altair; computed).

2. Working Principle

Gate and bulk charges: The gate charge balances the inversion and depletion charges, and the bulk charge is the depletion charge, both integrated over the channel (background knowledge; MOS Capacitor page).
Channel charge split: The inversion charge is split between source and drain by weighting with position, which in saturation leaves more charge with the source (Ward and Dutton; background knowledge for the weighting).
Currents from charges: The simulator computes each terminal current as the time derivative of that terminal’s charge, so returning to the same voltages returns the same charges (Kundert-style chapter).
Feed-forward: A nonzero $C_{D G}$ with $C_{G D} = 0$ in saturation means that a gate change moves drain charge while the drain cannot move gate charge, which a reciprocal capacitor cannot represent (Ward and Dutton).

3. Applications

Charge-sensitive circuits: Switched-capacitor filters, sample-and-hold circuits, charge pumps, dynamic logic and bootstrapped circuits, where non-conserving models give wrong voltages (Ward and Dutton; Kundert-style chapter).
Compact model capacitance options: Charge-based capacitance models in BSIM (capMod), PSP and EKV (BSIM3 and BSIM4 page; EKV page).
Delay and power estimates: Gate, overlap and junction capacitances for switching delay and dynamic power (background knowledge).
Current status: All modern compact models are charge-based; Meyer remains only in SPICE Levels 1 to 3 (Kundert-style chapter; SPICE Level 1-3 page).

Charges and Partitioning

Name	Formula	Related Formulae	Variables/Constants
Terminal charges and the capacitance matrix	$Q_{G} + Q_{D} + Q_{S} + Q_{B} = 0, i_{x} (t) = \frac{d Q _{x}}{d t} = \sum_{y} \frac{\partial Q _{x}}{\partial V _{y}} \frac{d V _{y}}{d t}$	$C_{x y} = - \frac{\partial Q _{x}}{\partial V _{y}} (x \neq = y), C_{xx} = \frac{\partial Q _{x}}{\partial V _{x}}, \sum_{x} C_{x y} = 0 (column sums, with sign convention)$	$Q_{G}, Q_{D}, Q_{S}, Q_{B} : c ha r g es a ss i g n e d t o g a t e, d r ain, so u r ce an d b u l k$ $i_{x} : c ha r g in g c u r r e n t in t o t er mina l x$ $V_{y} : t er mina l v o l t a g es$ $C_{x y} : t r an sc a p a c i t an ce f r o m t er mina l y t o t er mina l x (s i g n co n v e n t i o n, ba c k g r o u n d k n o w l e d g e); W a r d an d D u tt o n : c ha r g es co m p u t e d d i r ec tl y f r o m t er mina l v o l t a g es, so t h e m o d e l co n ser v es c ha r g e, w i t h C_{y x} = \partial Q_{y} / \partial V_{x} (E q . 11), tw o c a p a c i t an ces b e tw ee n e a c h p ai r o f t er mina l s, an d C_{y x} \neq = C_{x y} in g e n er a l, so t h e e l e m e n t s c ann o t b e r e p r ese n t e d a s or d ina r y r ec i p r oc a l c a p a c i t or s (f or e x am pl e C_{GB} \neq = C_{B G} an d C_{G D} \neq = C_{D G}); U B C E L E C 577 : c a p a c i t an ces n o t n ecess a r i l y r ec i p r oc a l, w i t h C_{G D} an d C_{D G} a s t h e e x am pl e$ $(n o co m p u t e d v a l u e)$
Ward-Dutton charge partitioning	$Q_{D} = b Q_{c}, Q_{S} = (1 - b) Q_{c}$	$Q_{D} = W \int_{0}^{L} \frac{y}{L} Q_{in v} (y) d y, Q_{S} = W \int_{0}^{L} (1 - \frac{y}{L}) Q_{in v} (y) d y (linear partition)$	$Q_{c} : t o t a l c hann e l c ha r g e$ $b : d r ain f r a c t i o n$ $y : p os i t i o n a l o n g t h e c hann e l, Q_{in v} (y) : in v er s i o n c ha r g e p er a r e a; W a r d an d D u tt o n : t h e s im pl es t sc h e m e s pl i t s t h e c hann e l c ha r g e e q u a l l y (b = 1/2), a p h y s i c a l o pt i o n s pl i t s t h e c hann e l a t y_{0} = a L, t h e e x a c t n u m er i c a l r es u l t in s a t u r a t i o n g i v es a l a r g er f r a c t i o n t o t h e so u r ce t han t o t h e d r ain, an d M ey e r^{'} s m o d e l g i v es a l l o f i t t o t h e so u r ce; t h e l in e a r - w e i g h t in g f or m, w hi c h g i v es 40 p er ce n t t o t h e d r ain an d 60 p er ce n t t o t h e so u r ce in l o n g - c hann e l s a t u r a t i o n an d i s t h e B S I M X P A R T = 0 o pt i o n (w i t h 0.5 f or 50/50 an d 1 f or 0/100), i s ba c k g r o u n d k n o w l e d g e$ $(co m p u t e d : in l o n g - c hann e l s a t u r a t i o n Q_{c} = - (2/3) C_{o x} W L V_{o v}, so t h e 40/60 s pl i t g i v es Q_{D} = - (4/15) C_{o x} W L V_{o v} an d Q_{S} = - (2/5) C_{o x} W L V_{o v}, f r o m t h e l in e a r - p a r t i t i o n in t e g r a l o f t h e s q u a r e - r oo t c hann e l - c ha r g e p r o f i l e)$

Intrinsic Capacitances and Conservation

Name	Formula	Related Formulae	Variables/Constants
Intrinsic capacitances in long-channel saturation	$C_{GS} = \frac{2}{3} C_{o x} W L, C_{G D} = - \frac{\partial Q _{G}}{\partial V _{D}} = 0$	$C_{D G} = - \frac{\partial Q _{D}}{\partial V _{G}} = \frac{4}{15} C_{o x} W L (40/60), \frac{1}{3} C_{o x} W L (50/50)$	$C_{GS} : g a t e - so u r ce c a p a c i t an ce$ $C_{G D} : g a t e - d r ain c a p a c i t an ce$ $C_{D G} : d r ain - g a t e t r an sc a p a c i t an ce$ $V_{o v} : g a t e o v er d r i v e (l o n g - c hann e l r es u l t s, ba c k g r o u n d k n o w l e d g e); W a r d an d D u tt o n : in s a t u r a t i o n t h e c ha r g e m o d e l g i v es C_{G D} = 0 b u t a n o n z er o C_{D G}, a f ee d - f or w a r d e f f ec t, w h er e a s M ey e r^{'} s m o d e l se t s C_{D G} = C_{G D}; M ey er g i v es z er o g a t e - b u l k c a p a c i t an ce ab o v e t h r es h o l d w hi l e t h e c ha r g e m o d e l g i v es s i g ni f i c an t v a l u es; M ey er f or m s o n t h e S P I C E L e v e l 1 - 3 p a g e$ $(co m p u t e d : w i t h 4 nm o x i d e, C_{o x} = 8.6 \times 1 0^{- 3} F/ m^{2}, an d C_{GS} i s 1.04 fF/ μ m o f w i d t h a t L = 0.18 μ m an d 5.8 fF/ μ m a t 1 μ m)$
Error of a capacitance-based charge integration	$Δ q_{n e t} = \sum_{n} C (v_{n + 1}) (v_{n + 1} - v_{n}) \neq = 0 (capacitance-based)$	$q (v) = C v + D v^{2} \Rightarrow Δ q_{n e t} = q (v_{f ina l}) - q (v_{ini t ia l}) = 0 (charge-based, closed path)$	$Δ q_{n e t} : n e t c ha r g e d e l i v er e d o v er a v o l t a g e p a t h, C (v) : v o l t a g e - d e p e n d e n t c a p a c i t an ce$ $v_{n} : v o l t a g e a t s t e p n, q (v) : c ha r g e f u n c t i o n$ $D : n o n l in e a r i t y coe f f i c i e n t; K u n d er t - s t y l e c ha pt er : t h e M ey er m o d e l o f M O S 1, M O S 2 an d M O S 3 d e f in es c a p a c i t an ce a s a f u n c t i o n o f t er mina l v o l t a g es an d d oes n o t co n ser v e c ha r g e, b ec a u se c a p a c i t an ce i s in cr e m e n t a l an d t h e er r or s a cc u m u l a t e e a c h t im e s t e p; M ey e r^{'} s c a p a c i t an ces ha v e n o co n s i s t e n t c ha r g e f u n c t i o n s; a 1 mV s t e p u p an d d o w n w i t h C (0) = 1 μ F an d C (1 mV) = 1.1 μ F g i v es a n e t c ha r g e o f - 0.1 nC, w hi l e q (v) = C v + D v^{2} w i t h D = 50 μ F/V g i v es s t e p c u r r e n t s o f 1.05 an d - 1.05 A in 1 ns an d z er o n e t c ha r g e; t i g h t e nin g r e l t o l r e d u ces b u t c ann o t r e m o v e t h e er r or; W a r d - D u tt o n, Y an g - C ha tt er j ee an d B S I M m o d e l s a r e c ha r g e - ba se d, an d e v e n c ha r g e - co n ser v in g s im u l a t or s k ee p a s ma l l co n v er g e n ce er r or$ $(co m p u t e d : 1.1 μ F x 1 mV - 1 μ F x 1 mV = 0.1 nC, t h e q u o t e d er r or; q (1 mV) = 1.05 nC, so 1 ns s t e p s c a r r y 1.05 A)$

Extrinsic Capacitances

Name	Formula	Related Formulae	Variables/Constants
Overlap and fringe capacitances	$C_{GS O}^{t o t} = C GS O \cdot W, C_{G D O}^{t o t} = C G D O \cdot W, C_{GB O}^{t o t} = C GB O \cdot L$	$C_{GS, t o t a l} = C_{GS, in t r in s i c} + C_{GS O}^{t o t}$	$C GS O, C G D O : g a t e - so u r ce an d g a t e - d r ain o v er l a p c a p a c i t an ce p er w i d t h$ $C GB O : g a t e - b u l k o v er l a p p er l e n g t h$ $W, L : w i d t h an d l e n g t h; A l t ai r (S P I C E 3) : C GS O, C G D O an d C GB O w i t h e x am pl e v a l u es 4.0 \times 1 0^{- 11}, 4.0 \times 1 0^{- 11} an d 2.0 \times 1 0^{- 10} F/m, an d o v er l a p, t hin - o x i d e an d j u n c t i o n co n t r ib u t i o n s t o c ha r g e s t or a g e; B S I M 4.1.0 (o n t h e B S I M 3 an d B S I M 4 p a g e) : se p a r a t e so u r ce - an d d r ain - s i d e o v er l a p p a r am e t er s an d t h e c ha r g e - t hi c k n ess c a p a c i t an ce m o d e l$ $(co m p u t e d : 4.0 \times 1 0^{- 11} F/m i s 0.04 fF/ μ m, s ma l l a g ain s t t h e 1.04 fF/ μ m in t r in s i c C_{GS} a t 0.18 μ m in t hi s o l d - p r ocess e x am pl e)$
Junction capacitances	$C_{j} = \frac{C J \cdot A _{D}}{( 1 + V _{R} / P B ) ^{M J}} + \frac{C J S W \cdot P _{D}}{( 1 + V _{R} / P B ) ^{M J S W}}$	$C_{j} linearized above F C \cdot P B in forward bias$	$C_{j} : d r ain (or so u r ce) j u n c t i o n c a p a c i t an ce$ $C J : b o tt o m c a p a c i t an ce p er a r e a$ $A_{D} : d r ain a r e a$ $V_{R} : r e v er se bia s$ $P B : b u i l t - in p o t e n t ia l$ $M J : b o tt o m g r a d in g coe f f i c i e n t$ $C J S W : s i d e w a l l c a p a c i t an ce p er l e n g t h$ $P_{D} : d r ain p er im e t er$ $M J S W : s i d e w a l l g r a d in g$ $F C : f or w a r d - bia s coe f f i c i e n t (S P I C E j u n c t i o n f or m, ba c k g r o u n d k n o w l e d g e; j u n c t i o n p h y s i cs o n t h e P N J u n c t i o n p a g e); A l t ai r (S P I C E 3) : C J e x am pl e 2.0 \times 1 0^{- 4} F/ m^{2}, M J 0.5, C J S W e x am pl e 1.0 \times 1 0^{- 9} F/m, M J S W 0.50 (L e v e l 1) or 0.33 (L e v e l s 2 an d 3), P B 0.8 V d e f a u l t (0.87 e x am pl e) an d F C 0.5$ $(co m p u t e d : an a ss u m e d 1 b y 0.5 μ m d r ain w i t h 3 μ m p er im e t er a t 1 V r e v er se bia s ha s 0.068 fF b o tt o m an d 2.3 fF s i d e w a l l c a p a c i t an ce w i t h t h e e x am pl e v a l u es)$

Important Questions

Ques: Should the channel charge be split 50/50 or 40/60 between drain and source?

Both are used. Ward and Dutton’s original model split the channel charge equally, $Q_{D} = Q_{S} = Q_{c} /2$ , as the simplest choice, while noting that the exact numerical result in saturation gives a larger fraction to the source and that Meyer’s model gives all of it to the source. Weighting the inversion charge linearly with position, $Q_{D} = W \int (y / L) Q_{in v} d y$ , gives 40 per cent to the drain and 60 per cent to the source in long-channel saturation (background knowledge), consistent with their statement that the source takes more. The 40/60 split is therefore the more physical one, and BSIM offers it as XPART = 0 alongside 50/50 and 0/100 (background knowledge). In quasi-static operation the split cannot be measured directly, which is why partitioning remains a modelling choice. Reference: D. E. Ward and R. W. Dutton, ‘A Charge-Oriented Model for MOS Transistor Capacitances’, IEEE Journal of Solid-State Circuits SC-13(5), 703-708 (October 1978) (University of Tennessee course copy; saturation fractions unreadable in the extract) (fetch-tool summary).

Ques: Why does the Meyer capacitance model fail in bootstrapped and latching circuits?

Because it does not conserve charge and it misses some capacitances. Ward and Dutton showed that Meyer’s model gives dc level errors of several volts in a bootstrap circuit: even with 64 time steps per input rise time, the output was off by 0.5 $V$ after two cycles, while the charge model stayed accurate with a time step equal to the rise time. In an SOS D-latch the old model never let the output go high, while the charge model predicted the correct behaviour, because its bulk-gate and bulk-source capacitances produced about 1 $V$ of back bias instead of 5 $V$ . Meyer’s model also sets the gate-bulk capacitance to zero above threshold and $C_{D G} = C_{G D}$ , which removes the feed-forward path in saturation. Reference: D. E. Ward and R. W. Dutton, ‘A Charge-Oriented Model for MOS Transistor Capacitances’, IEEE Journal of Solid-State Circuits SC-13(5), 703-708 (October 1978) (University of Tennessee course copy; saturation fractions unreadable in the extract) (fetch-tool summary).

Ques: How large is the charge error of a capacitance-based model in a simple example?

The Kundert-style chapter steps a nonlinear capacitor with $C (0) = 1$ $μ F$ and $C (1 mV) = 1.1$ $μ F$ up by 1 $mV$ and back. Evaluating the capacitance at the new voltage, the charge in is 1.1 $μ F$ times 1 $mV$ and the charge out 1 $μ F$ times 1 $mV$ , leaving -0.1 $nC$ (computed, matching the chapter). Defining the device by $q (v) = C v + D v^{2}$ with $D = 50$ $μ F/V$ instead gives $q (1 mV) = 1.05$ $nC$ , step currents of 1.05 A and -1.05 A in 1 $ns$ , and zero net charge (computed). The error does not vanish with smaller tolerances and is amplified in circuits such as an AC-coupled comparator that stores offset on capacitors. The chapter notes that SPICE’s MOS1 to MOS3 use Meyer, while Spectre provides charge-based Ward-Dutton, Yang-Chatterjee and BSIM models. Reference: Transient-analysis chapter, Section 4.2 (pp. 167-176) on charge conservation, attached on the Designer’s Guide forum (title and author not in the excerpt; style suggests K. Kundert, The Designer’s Guide to Spice and Spectre, 1995) (fetch-tool summary).

Ques: Why are MOSFET capacitances nonreciprocal?

Because they are derivatives of different terminal charges with respect to different voltages, and nothing forces $\partial Q_{x} / \partial V_{y}$ to equal $\partial Q_{y} / \partial V_{x}$ . Ward and Dutton define $C_{y x} = \partial Q_{y} / \partial V_{x}$ with two capacitances between each pair of terminals and give $C_{GB} \neq = C_{B G}$ and $C_{G D} \neq = C_{D G}$ as examples. In long-channel saturation the gate charge does not depend on the drain voltage, so $C_{G D} = 0$ , but the drain charge depends on the gate voltage, giving $C_{D G} = 4 C_{o x} W L /15$ with a 40/60 split or $C_{o x} W L /3$ with 50/50 (computed). Such a feed-forward element cannot be drawn as an ordinary capacitor, which is why compact models are implemented with charges, or with transcapacitance sources, rather than with capacitor elements (my reading). The UBC slides use the same example. Reference: D. E. Ward and R. W. Dutton, ‘A Charge-Oriented Model for MOS Transistor Capacitances’, IEEE Journal of Solid-State Circuits SC-13(5), 703-708 (October 1978) (University of Tennessee course copy; saturation fractions unreadable in the extract) (fetch-tool summary); UBC ELEC 577, Lecture 14: Capacitance (slides; author not named) (fetch-tool summary).

Ques: When do overlap and junction capacitances outweigh the intrinsic capacitance?

In short-channel devices. With 4 $nm$ of oxide, the intrinsic saturation $C_{GS} = (2/3) C_{o x} W L$ is about 1.04 $fF/ μ m$ of width at 0.18 $μ m$ and 5.8 $fF/ μ m$ at 1 $μ m$ (computed), so it falls in proportion to length. Overlap capacitance per width, CGSO and CGDO, does not scale with length, and fringe capacitance adds to it, so in short devices they become a large share of the total (background knowledge for modern values; the SPICE3 example of $4.0 \times 1 0^{- 11}$ $F/m$ , only 0.04 $fF/ μ m$ , is from an old process). Junction capacitance also matters: with the SPICE3 example values, an assumed 1 by 0.5 $μ m$ drain with 3 $μ m$ perimeter has 0.068 $fF$ of bottom and 2.3 $fF$ of sidewall capacitance at 1 $V$ reverse bias (computed), so the sidewall dominates small diffusions. Reference: Altair Activate block reference, SPICE MOSFET model parameters (levels 1 to 3), adapted from the SPICE3 user’s manual (fetch-tool summary).

Ques: Do charge-conserving simulators conserve charge exactly?

Not exactly, but well enough for practice. The Kundert-style chapter states that even charge-conserving simulators do not conserve charge completely, because the Newton iterations stop at a convergence criterion, but that they do much better than non-conserving ones: in its AC-coupled comparator example, Spectre’s charge-conserving models bring the output back almost to zero, while the Meyer-based model leaves an amplified residual. It also warns that some models conserve total charge without defining terminal charges correctly; the Statz GaAsFET model, for example, has no explicit drain and source charge relationships, so charge can appear to vanish from those terminals. Ward and Dutton’s charge model stayed accurate with a time step equal to the rise time, where Meyer’s model failed with 64 steps. Charge-based formulation is therefore necessary but not sufficient. Reference: Transient-analysis chapter, Section 4.2 (pp. 167-176) on charge conservation, attached on the Designer’s Guide forum (title and author not in the excerpt; style suggests K. Kundert, The Designer’s Guide to Spice and Spectre, 1995) (fetch-tool summary); D. E. Ward and R. W. Dutton, ‘A Charge-Oriented Model for MOS Transistor Capacitances’, IEEE Journal of Solid-State Circuits SC-13(5), 703-708 (October 1978) (University of Tennessee course copy; saturation fractions unreadable in the extract) (fetch-tool summary).

Quartz 5

Explorer

Charge and Capacitance Modelling