1. Theory

  • Definition: BSIM3 and BSIM4 are the Berkeley Short-channel IGFET Models, threshold-voltage-based compact MOSFET models from the University of California, Berkeley; BSIM3v3 became the first industry-standard compact model, and BSIM4 extends it for deep-submicron CMOS with thin oxides (BSIM3v3.2.2 manual; BSIM4.1.0 manual; background knowledge for the standardization).
  • Threshold-voltage basis: Both write the drain current in terms of a threshold voltage that includes body effect, narrow-width, short-channel roll-off and drain-induced barrier lowering, and an effective overdrive that joins subthreshold and strong inversion in one smooth expression (BSIM3v3.2.2 manual).
  • Single-equation current: Mobility degradation, velocity saturation, bulk charge, series resistance and the three output-resistance mechanisms are combined in one continuous current equation with a smoothed drain voltage , so that derivatives are continuous across all regions (BSIM3v3.2.2 manual; BSIM4v4.7 manual).
  • Physics plus fitting: The structure follows device physics, but parameters such as DVT0, ETA0, UA and PCLM are fitted to measured devices, with binning in length and width when needed (BSIM3v3.2.2 manual; background knowledge for binning).
  • BSIM4 additions: Gate tunnelling, high-k gate dielectrics through an equivalent thickness, pocket-implant threshold effects, GIDL, stress and well-proximity effects, and RF gate and substrate resistance networks (BSIM4.1.0 and BSIM4v4.7 manuals).

2. Working Principle

  • Characteristic length: Short-channel roll-off and DIBL both scale as exponentials of , where describes how far the drain field reaches into the channel (BSIM3v3.2.2 manual; Short Channel MOSFET page).
  • Smoothing functions: and replace the hard region boundaries of SPICE Level 1 to 3 with smooth functions, which removes kinks in conductance and capacitance and helps simulator convergence (BSIM3v3.2.2 manual; SPICE Level 1-3 page).
  • Velocity saturation: The critical field lowers the saturation voltage below the overdrive in short devices, making the current nearly linear in overdrive (BSIM3v3.2.2 manual).
  • Output conductance: Channel-length modulation, DIBL and substrate-current body effect each give an Early voltage, combined in parallel, so the dominant mechanism changes with drain bias (BSIM3v3.2.2 manual).
  • Tunnelling: In BSIM4 the gate currents follow a direct-tunnelling expression whose exponent scales with the electrical oxide thickness, partitioned between source, drain and body (BSIM4.1.0 and BSIM4.3.0 manuals).

3. Applications

  • CMOS process design kits: BSIM3 for 0.5 to 0.18 processes and BSIM4 for 0.13 to planar 20 -class processes in foundry design kits (background knowledge).
  • Analog and RF design: BSIM4’s gate resistance, substrate network, NQS and noise models for RF and mixed-signal circuits (BSIM4v4.7 manual).
  • Leakage and power analysis: Gate tunnelling and GIDL currents for standby-power estimates of thin-oxide processes (BSIM4.1.0 manual).
  • Current status: FinFET and gate-all-around processes use BSIM-CMG, and FD-SOI uses BSIM-IMG, while BSIM4 remains the standard for planar bulk CMOS (background knowledge).

Threshold Voltage and Gate Overdrive

NameFormulaRelated FormulaeVariables/Constants
Threshold voltage with body effect and short-channel terms












Drain-induced barrier lowering




Unified effective gate overdrive







Mobility, Saturation and Drain Current

NameFormulaRelated FormulaeVariables/Constants
Mobility model (mobMod = 1)







Velocity saturation and saturation voltage






Drain current with series resistance and smoothing






Output Resistance and BSIM4 Extensions

NameFormulaRelated FormulaeVariables/Constants
Output resistance and Early voltage





BSIM4 gate dielectric and gate tunnelling










Important Questions

Ques: Is the BSIM4 gate-tunnelling constant A for NMOS 4.97232 or amperes per square volt?

Both values appear in Berkeley manuals. The BSIM4.3.0 and BSIM4v4.7 manuals, as read, give for NMOS and 3.42537 for PMOS, while the BSIM4.1.0 manual gives for NMOS, with the same of in all three. The magnitude cannot be settled from the expression alone, because the exponential with suppresses the current by many orders of magnitude and depends on fitted parameters. The reference BSIM4 implementation uses for electron tunnelling from the conduction band and for hole tunnelling (background knowledge), so the value with the factor of is the more likely one, and its absence in the later manuals as read is probably an extraction loss of the exponent (my reading). Since multiplies the whole current, a factor of error would be obvious in any leakage fit. Reference: W. Liu, X. Jin, K. M. Cao and C. Hu, ‘BSIM4.1.0 MOSFET Model: User’s Manual’, Memorandum UCB/ERL M00/48, University of California, Berkeley (2000) (fetch-tool summary); BSIM4.3.0 MOSFET Model User’s Manual, University of California, Berkeley (2003) (IEEE Denver SSCS copy) (fetch-tool summary); T. H. Morshed, D. D. Lu, W. Yang, M. V. Dunga, X. Xi, J. He, W. Liu, K. M. Cao, X. Jin, J. J. Ou, M. Chan, A. M. Niknejad and C. Hu, ‘BSIM4v4.7 MOSFET Model User’s Manual’, University of California, Berkeley (2011) (SIMetrix copy) (fetch-tool summary).

Ques: How large is the short-channel threshold roll-off with default BSIM3 parameters?

With the BSIM3v3.2.2 defaults TOX = 15 and NCH = , the surface potential is 0.84 , the depletion width 80 and the characteristic length about 60 (computed). With an assumed source, is 0.165 , and DVT0 = 2.2 and DVT1 = 0.53 give a roll-off of 312 at 0.18 , 49 at 0.5 and 4.5 at 1 (computed). The default DIBL coefficients ETA0 = 0.08 and DSUB = 0.56 give 64, 9.3 and 0.8 (computed). The exponential decay with shows why short-channel effects appear abruptly as length falls. Real model cards fit DVT0, DVT1 and ETA0 to measured roll-off, so the defaults are only placeholders. Reference: W. Liu, X. Jin, J. Chen, M.-C. Jeng, Z. Liu, Y. Cheng, K. Chen, M. Chan, K. Hui, J. Huang, R. Tu, P. K. Ko and C. Hu, ‘BSIM3v3.2.2 MOSFET Model Users’ Manual’, University of California, Berkeley (1999) (Columbia course copy; equations restated by the fetch tool) (fetch-tool summary); BSIM3v3.2.2 Manual, Appendix A: Parameter List, University of California, Berkeley (1999) (UC Riverside course copy) (fetch-tool summary).

Ques: Why does BSIM3 use a single smooth expression for the gate overdrive?

Because separate subthreshold and strong-inversion equations, as in SPICE Level 2 and 3, have discontinuous derivatives at the boundary, which distort transconductance, capacitance and harmonic distortion and can stall the simulator’s Newton iterations (SPICE Level 1-3 page; background knowledge). BSIM3’s , with a further term in the denominator, tends to above threshold and to an exponential below it, with the swing set by , NFACTOR, the coupling capacitances CDSC and VOFF. At the subthreshold swing is about 71 per decade at 300 (computed). The BSIM3 manual applies the same idea to the drain voltage: follows in the linear region and tends to in saturation, with DELTA = 0.01 by default setting the sharpness. Reference: W. Liu, X. Jin, J. Chen, M.-C. Jeng, Z. Liu, Y. Cheng, K. Chen, M. Chan, K. Hui, J. Huang, R. Tu, P. K. Ko and C. Hu, ‘BSIM3v3.2.2 MOSFET Model Users’ Manual’, University of California, Berkeley (1999) (Columbia course copy; equations restated by the fetch tool) (fetch-tool summary); BSIM3v3.2.2 Manual, Appendix A: Parameter List, University of California, Berkeley (1999) (UC Riverside course copy) (fetch-tool summary); SPICE Level 1-3 MOSFET Models page of this vault.

Ques: How much does velocity saturation lower the saturation voltage in BSIM3?

Through the critical field and from the BSIM3 manual. With the default VSAT of and U0 = 670 , is 2.39 (computed). For 1 of effective overdrive and , is 0.70 at 1 but only 0.30 at 0.18 , against 1 for the long-channel square law (computed). Mobility degradation makes the effect smaller: the default UA and UB lower the mobility to about 511 at this bias (computed), which raises . In short devices the current therefore grows almost linearly with overdrive, and the effective mobility fitted with UA and UB interacts with VSAT, so the two must be extracted together (my reading). Reference: W. Liu, X. Jin, J. Chen, M.-C. Jeng, Z. Liu, Y. Cheng, K. Chen, M. Chan, K. Hui, J. Huang, R. Tu, P. K. Ko and C. Hu, ‘BSIM3v3.2.2 MOSFET Model Users’ Manual’, University of California, Berkeley (1999) (Columbia course copy; equations restated by the fetch tool) (fetch-tool summary); BSIM3v3.2.2 Manual, Appendix A: Parameter List, University of California, Berkeley (1999) (UC Riverside course copy) (fetch-tool summary).

Ques: What sets the output resistance of a BSIM3 transistor?

Three mechanisms, each with its own Early voltage, combined as in Eq. 2.6.10 of the BSIM3 manual. Channel-length modulation, with PCLM = 1.3 by default, dominates just above saturation; drain-induced barrier lowering, through with PDIBLC1 = 0.39, PDIBLC2 = 0.0086 and DROUT = 0.56, dominates at intermediate drain voltage; and the substrate-current-induced body effect, with PSCBE1 = V/m and PSCBE2 = m/V, takes over at high drain voltage, where impact ionization raises the body potential and lowers the threshold. Because the smallest Early voltage dominates the parallel sum, the output resistance first rises and then falls with drain voltage. BSIM4 adds a fourth term for drain-induced threshold shift in pocket-implanted devices. These parameters set the intrinsic gain that analog designers depend on. Reference: W. Liu, X. Jin, J. Chen, M.-C. Jeng, Z. Liu, Y. Cheng, K. Chen, M. Chan, K. Hui, J. Huang, R. Tu, P. K. Ko and C. Hu, ‘BSIM3v3.2.2 MOSFET Model Users’ Manual’, University of California, Berkeley (1999) (Columbia course copy; equations restated by the fetch tool) (fetch-tool summary); BSIM3v3.2.2 Manual, Appendix A: Parameter List, University of California, Berkeley (1999) (UC Riverside course copy) (fetch-tool summary); T. H. Morshed, D. D. Lu, W. Yang, M. V. Dunga, X. Xi, J. He, W. Liu, K. M. Cao, X. Jin, J. J. Ou, M. Chan, A. M. Niknejad and C. Hu, ‘BSIM4v4.7 MOSFET Model User’s Manual’, University of California, Berkeley (2011) (SIMetrix copy) (fetch-tool summary).

Ques: Why was BSIM4 needed after BSIM3?

Because oxides of about 3 and below conduct tunnelling currents and because processes added pocket implants, high-k dielectrics and RF uses that BSIM3 did not describe. The BSIM4.1.0 manual introduces electrical and physical oxide thicknesses and a gate permittivity, so that a 3 layer of permittivity 7.8 behaves as 1.5 of SiO2, a value its own formula reproduces (computed), along with poly-gate depletion, gate-to-channel, gate-to-body and gate-to-source/drain tunnelling, a unified mobility model, asymmetric bias-dependent source and drain resistance, and an exact characteristic length that removes a phantom threshold roll-up at very short channels. The BSIM4v4.7 manual adds pocket-implant and drain-induced threshold-shift terms, GIDL, stress and well-proximity effects, gate and substrate resistance networks, a charge-deficit NQS model and holistic noise models. Reference: W. Liu, X. Jin, K. M. Cao and C. Hu, ‘BSIM4.1.0 MOSFET Model: User’s Manual’, Memorandum UCB/ERL M00/48, University of California, Berkeley (2000) (fetch-tool summary); T. H. Morshed, D. D. Lu, W. Yang, M. V. Dunga, X. Xi, J. He, W. Liu, K. M. Cao, X. Jin, J. J. Ou, M. Chan, A. M. Niknejad and C. Hu, ‘BSIM4v4.7 MOSFET Model User’s Manual’, University of California, Berkeley (2011) (SIMetrix copy) (fetch-tool summary).

Related pages in this vault: Parameter Extraction Methods, Multi-Gate Models (BSIM-CMG and BSIM-IMG), Binning and Geometry Scaling, Short Channel MOSFET, SPICE Level 1-3 MOSFET Models, Surface-Potential Models (PSP and HiSIM), Charge-Based Models (EKV), RF and Non-Quasi-Static Effects, Long Channel MOSFET.