1. Theory

  • Definition: MOSFET noise models describe the random current fluctuations of a transistor for circuit simulation: channel thermal noise, induced gate noise at high frequency, and flicker (1/f) noise at low frequency (Miura-Mattausch; Hung et al.).
  • Thermal noise: The resistive channel generates white noise , with equal to 1 at zero drain bias and 2/3 in long-channel saturation, and larger in short devices (Miura-Mattausch; background knowledge for the values).
  • Induced gate noise: Thermal fluctuations of the channel potential couple capacitively to the gate, giving a gate noise current that rises as the square of frequency and is partly correlated with the drain noise (Miura-Mattausch).
  • Flicker noise: Trapping and detrapping of carriers in oxide traps and correlated mobility fluctuations give a 1/f spectrum, which dominates below a corner frequency of kHz to MHz (Hung et al.; Miura-Mattausch; computed).
  • Model forms: SPICE uses an empirical KF, AF flicker model; BSIM and HiSIM use physics-based unified flicker models and derive thermal noise from the I-V model (Altair; Hung et al.; Miura-Mattausch).

2. Working Principle

  • Nyquist noise of channel segments: Each short segment of the channel has a thermal noise current set by its local conductance, and integrating the segments along the channel gives the drain noise (Miura-Mattausch; Han et al.).
  • Pinch-off and : In saturation the inversion charge near the drain falls, so the integral gives 2/3 of the zero-bias value in long channels (background knowledge; computed from Han et al.’s form).
  • Short-channel excess noise: In short devices the noise is raised by changes of charge and effective length, mobility reduction along the channel, velocity saturation or heated carriers, depending on the author (Han et al.; Miura-Mattausch).
  • Trapping: Carriers tunnel into traps in the gate dielectric with a wide distribution of time constants, and the superposition of Lorentzian spectra gives 1/f noise; each trapped carrier also changes the mobility of nearby carriers (Hung et al.; background knowledge for the Lorentzian picture).
  • Small devices: With few traps per device, the 1/f noise varies strongly from device to device and becomes random telegraph noise (Miura-Mattausch; background knowledge for RTN).

3. Applications

  • Low-noise amplifiers: Thermal and induced gate noise, and their correlation, set the minimum noise figure of RF LNAs (Miura-Mattausch; background knowledge).
  • Oscillators and mixers: Flicker noise up-converts into close-in phase noise and appears at the output of mixers (background knowledge).
  • Analog front ends: Flicker noise limits precision amplifiers, sensors and data converters at low frequency, which drives chopping and large-area input devices (background knowledge).
  • Model extraction: Noise parameters from I-V and noise measurements, as in Hung et al. and HiSIM (Hung et al.; Miura-Mattausch).

Thermal and Induced Gate Noise

NameFormulaRelated FormulaeVariables/Constants
Channel thermal noise








Induced gate noise and correlation




Flicker Noise

NameFormulaRelated FormulaeVariables/Constants
SPICE flicker-noise model






Mobility fluctuation (Hooge)





Carrier-number fluctuation and the unified model




Important Questions

Ques: What causes the excess thermal noise of short-channel MOSFETs?

The sources disagree. Miura-Mattausch lists hot electrons (Knoblinger et al., 2001), channel-length modulation (Deen et al., 2002) and velocity saturation (Scholten et al., 2002) as proposed causes, and attributes the rise instead to position-dependent mobility reduction along the channel, which raises the potential, finding a universal relation between the gradient of and the threshold shift with no additional model parameters. Han et al. argue that hot-carrier noise in the velocity-saturation region is negligible and attribute the short-channel increase to a larger inversion charge from static feedback and a smaller effective length from channel-length modulation. Both reject large hot-carrier noise and tie the excess to electrostatics and the effective channel, so a modest rise above 2/3, rather than a drastic one, is the more likely picture (my reading). Reference: M. Miura-Mattausch and the HiSIM Team, ‘Measurements and Modeling of Noise in Advanced MOSFETs’, MOS-AK Meeting (20 April 2007) (slides) (fetch-tool summary); K. Han, H. Shin and K. Lee, ‘Thermal Noise Model for Short-Channel MOSFETs’, KAIST (journal and year not in the text; references to 2000) (equations partly garbled in the extract) (fetch-tool summary).

Ques: How large is the channel thermal noise of a MOSFET?

With (background knowledge for the form), a device with in saturation with has at 300 , 10.5 (computed). Referred to the gate with , it is about 1.05 (computed), which is why low-noise amplifiers need large transconductance. Han et al. derive the noise as , which reproduces both limits: with the full inversion charge at zero drain bias it gives , and with two thirds of it in long-channel saturation it gives (computed). Their closed form is within 5 per cent of the full integral for all lengths and biases. Reference: K. Han, H. Shin and K. Lee, ‘Thermal Noise Model for Short-Channel MOSFETs’, KAIST (journal and year not in the text; references to 2000) (equations partly garbled in the extract) (fetch-tool summary); M. Miura-Mattausch and the HiSIM Team, ‘Measurements and Modeling of Noise in Advanced MOSFETs’, MOS-AK Meeting (20 April 2007) (slides) (fetch-tool summary).

Ques: Is MOSFET flicker noise caused by carrier-number or mobility fluctuation?

Both, and the unified model combines them. Hung et al. built a physics-based model that combines carrier-number fluctuations from oxide traps with correlated surface mobility fluctuations, accurate in linear, saturation and subthreshold regions for long-channel and submicron n- and p-channel devices, with parameters from routine I-V and noise measurements. The number-fluctuation picture of McWhorter gives input-referred noise independent of bias in a simple form, while the Hooge picture gives (background knowledge for both forms). Miura-Mattausch finds that 1/f noise is mostly governed by carrier fluctuation from trapping and detrapping, with an inhomogeneous trap distribution explaining device statistics. The trap-based number fluctuation is therefore the dominant mechanism in MOSFETs, with mobility correlation as a correction, particularly for n-channel devices (my reading). Reference: K. K. Hung, P. K. Ko, C. Hu and Y. C. Cheng, ‘A Physics-Based MOSFET Noise Model for Circuit Simulators’, IEEE Transactions on Electron Devices 37(5), 1323-1333 (1990), doi:10.1109/16.108195 (abstract only); M. Miura-Mattausch and the HiSIM Team, ‘Measurements and Modeling of Noise in Advanced MOSFETs’, MOS-AK Meeting (20 April 2007) (slides) (fetch-tool summary).

Ques: Where is the flicker-noise corner frequency of a typical MOSFET?

In the tens to hundreds of kilohertz for small devices. For an assumed 10/1 device with of oxide capacitance at 0.3 overdrive, the channel holds about electrons, the drain current is about 155 and the transconductance 1.04 (computed, with an assumed mobility of 400 cm2/(V s)). With an assumed Hooge parameter of , the 1/f noise equals the thermal noise at about 130 (computed). The corner moves down as the gate area grows, since the number of carriers, and of traps, rises with , which is why precision amplifiers use large input devices. Miura-Mattausch’s 1/f measurements used a device of the same 10/1 size at and . Reference: M. Miura-Mattausch and the HiSIM Team, ‘Measurements and Modeling of Noise in Advanced MOSFETs’, MOS-AK Meeting (20 April 2007) (slides) (fetch-tool summary); K. K. Hung, P. K. Ko, C. Hu and Y. C. Cheng, ‘A Physics-Based MOSFET Noise Model for Circuit Simulators’, IEEE Transactions on Electron Devices 37(5), 1323-1333 (1990), doi:10.1109/16.108195 (abstract only).

Ques: Up to what frequency are the classical induced-gate-noise expressions valid?

Up to about 1 in saturation, according to Miura-Mattausch. The van der Ziel expressions, with , and a correlation of about in long channels (background knowledge), come from a small-signal expansion of the channel equations, after Shoji (1966), and are not valid outside saturation or at higher frequency. The induced gate noise and its correlation are governed by the same channel mechanism as the drain thermal noise, so HiSIM computes all three from its I-V and surface-potential solution with no extra parameters. Because the gate noise rises as , it becomes important above a few GHz in RF low-noise amplifiers, where the correlation can partly cancel it through input matching (background knowledge). Reference: M. Miura-Mattausch and the HiSIM Team, ‘Measurements and Modeling of Noise in Advanced MOSFETs’, MOS-AK Meeting (20 April 2007) (slides) (fetch-tool summary).

Ques: Why do small transistors show large device-to-device differences in flicker noise?

Because they contain only a few traps. Miura-Mattausch reports that the measured 1/f noise statistics cannot be reproduced with a homogeneous trap density across the wafer, but are explained by an inhomogeneous trap distribution, while the fitted trap density is nearly universal for a mature technology. When a device holds only a handful of traps within tunnelling distance of the channel, its spectrum is a sum of a few Lorentzians rather than a smooth 1/f, and individual traps appear as random telegraph noise (background knowledge). The average noise still scales as , but the spread grows as the area falls, so circuit simulators that use one average flicker parameter underestimate the worst-case noise of small devices (my reading). Hung et al.’s oxide-trap mechanism supplies the physical basis. Reference: M. Miura-Mattausch and the HiSIM Team, ‘Measurements and Modeling of Noise in Advanced MOSFETs’, MOS-AK Meeting (20 April 2007) (slides) (fetch-tool summary); K. K. Hung, P. K. Ko, C. Hu and Y. C. Cheng, ‘A Physics-Based MOSFET Noise Model for Circuit Simulators’, IEEE Transactions on Electron Devices 37(5), 1323-1333 (1990), doi:10.1109/16.108195 (abstract only).

Related pages in this vault: Surface-Potential Models (PSP and HiSIM), Diode Compact Models, Model Quality and Benchmark Tests, Low-Frequency Noise Analyzer, SPICE Level 1-3 MOSFET Models, Charge-Based Models (EKV), Mismatch and Variability, BSIM3 and BSIM4, Junction Field Effect Transistor (JFET).