Dual-Gate MOSFET

1. Theory

Definition: A dual-gate MOSFET is an n-channel enhancement-mode device with two gates placed in series along the channel: gate 1 ( $G_{1}$ ) next to the source and gate 2 ( $G_{2}$ ) next to the drain.
Not the double-gate MOSFET: Its gates act one after the other along the channel, not in parallel on opposite faces of a film.
Series model: It behaves as two MOSFETs in series, $M_{1}$ and $M_{2}$ , carrying the same drain current and joined at an internal node $X$ .
Built-in cascode: $M_{2}$ acts as a cascode device on top of $M_{1}$ , so the structure is a single-device cascode amplifier.
Body effect on $M_{2}$ : The source of $M_{2}$ sits at $V_{X}$ above the shared substrate, so it has a higher threshold voltage than $M_{1}$ .
Shielding gate: $G_{2}$ screens $G_{1}$ from the drain, cutting gate-to-drain feedback capacitance.
Generality: The same series analysis applies to dual-gate MESFETs and HEMTs.

2. Working Principle

Cascode operation: With $G_{2}$ biased high, both devices are saturated, $G_{1}$ sets the current and gain, and the output resistance is boosted to about $g_{m 2}^{'} r_{o 1} r_{o 2}$ .
Low feedback capacitance: Node $X$ follows $G_{1}$ with a gain of only about $- 1$ , so Miller multiplication of $C_{g d 1}$ is small and RF stability and matching improve.
Gain control: Lowering $V_{G 2 S}$ pulls $V_{X}$ down until $M_{1}$ enters the triode region, smoothly reducing the gain from $G_{1}$ (automatic gain control).
Mixing: The product of the signals on $G_{1}$ (RF) and $G_{2}$ (LO) creates sum and difference frequencies through the cross transconductance $g_{mi x}$ .
Port isolation: Applying RF and LO to separate gates gives natural isolation between them.
Headroom cost: The pair needs a drain voltage of at least two overdrive voltages to stay saturated.

3. Applications

AGC RF amplifiers: Gain-controlled front-end amplifiers in VHF/UHF TV tuners, FM radios and communication receivers.
Active mixers: Low-cost receiver mixers with RF on $G_{1}$ and LO on $G_{2}$ .
Variable-gain MMIC stages: Dual-gate GaAs FETs and HEMTs in variable-gain microwave amplifiers.
Current status: Discrete dual-gate MOSFETs are now mostly found in legacy designs; integrated silicon tuner ICs implement the same cascode idea on-chip.

Name	Formula	Related Formulae	Variables/Constants
Series equivalent and internal node	$V_{D S} = V_{D S 1} + V_{D S 2}, V_{D S 1} = V_{X}, V_{D S 2} = V_{D S} - V_{X}$	$V_{GS 1} = V_{G 1 S}, V_{GS 2} = V_{G 2 S} - V_{X}, V_{S B 2} = V_{X}$	$V_{X} : p o t e n t ia l o f t h e c hann e l u n d er t h e g a p b e tw ee n t h e tw o g a t es, r e l a t i v e t o t h e so u r ce$ $V_{G 1 S}, V_{G 2 S} : g a t e 1 an d g a t e 2 v o l t a g es r e l a t i v e t o t h e so u r ce$ $V_{D S} : t o t a l d r ain - so u r ce v o l t a g e$ $(the same current I_{D} flows through M_{1} and M_{2})$
Threshold voltage of the upper device (body effect)	$V_{T H 2} (V_{X}) = V_{T H 0} + γ (2 ϕ_{F} + V_{X} - 2 ϕ_{F})$	$V_{T H 1} = V_{T H 0} (V_{S B 1} = 0) (see Long Channel MOSFET page)$	$V_{T H 0} : t h r es h o l d v o l t a g e a t z er o so u r ce - s u b s t r a t e bia s$ $γ : b o d y e f f ec t coe f f i c i e n t$ $(M_{2} has its source raised to V_{X} above the substrate, so it has a higher threshold than M_{1})$
Both devices saturated (cascode operation)	$I_{D} = \frac{β _{1}}{2} (V_{G 1 S} - V_{T H 1})^{2} = \frac{β _{2}}{2} (V_{G 2 S} - V_{X} - V_{T H 2})^{2}$	$V_{X} = V_{G 2 S} - V_{T H 2} - \frac{β _{1}}{β _{2}} (V_{G 1 S} - V_{T H 1})$	$β_{1}, β_{2} : t r an sco n d u c t an ce p a r am e t er s o f M_{1} an d M_{2}$ $(since V_{T H 2} depends on V_{X}, the expression for V_{X} is implicit; neglecting the body effect it is exact)$
Conditions for both devices to be saturated	$V_{G 2 S} - V_{T H 2} \geq (1 + \frac{β _{1}}{β _{2}}) (V_{G 1 S} - V_{T H 1}), V_{D S} \geq V_{G 2 S} - V_{T H 2}$	$V_{X} \geq V_{G 1 S} - V_{T H 1} (M_{1} saturated), V_{D S 2} \geq V_{G 2 S} - V_{X} - V_{T H 2} (M_{2} saturated)$	$(the first inequality keeps M_{1} in saturation; the second keeps M_{2} in saturation and does not depend on V_{X})$
Minimum drain voltage (headroom)	$V_{D S, min} = V_{G 2 S} - V_{T H 2} = V_{X} + V_{o v 2}$	$V_{D S, min} \to V_{o v 1} + V_{o v 2} (V_{X} = V_{o v 1})$	$V_{o v 1} = V_{G 1 S} - V_{T H 1} : o v er d r i v e o f M_{1}$ $V_{o v 2} = V_{G 2 S} - V_{X} - V_{T H 2} : o v er d r i v e o f M_{2}$ $(a single MOSFET needs only one overdrive voltage; the series pair needs the sum)$
M1 in the triode region (gate 2 controls the gain)	$I_{D} = β_{1} [V_{o v 1} V_{X} - \frac{V _{X}^{2}}{2}] = \frac{β _{2}}{2} (V_{G 2 S} - V_{X} - V_{T H 2})^{2}$	$g_{m 1} = β_{1} V_{X} (triode, see Long Channel MOSFET page)$	$(valid when V_{X} < V_{o v 1}, which happens when V_{G 2 S} is lowered so that M_{2} limits the current; the gain of M_{1} then falls with V_{X})$
Tied-gate limit	$I_{D s a t} = \frac{μ _{n} C _{o x}}{2} \frac{Z}{L _{1} + L _{2}} (V_{GS} - V_{T H})^{2}$	$V_{G 1 S} = V_{G 2 S} = V_{GS}, V_{X} = (1 - \frac{1}{2}) V_{o v} (equal devices)$	$(consistency check: with the gates tied the pair is a single long-channel device of length L_{1} + L_{2}; for equal devices M_{1} is in the triode region and M_{2} in saturation, so the cascode conditions above are not met)$
Small-signal transconductances	$g_{m, G 1} = \frac{g _{m 1} ( g _{m 2}^{'} + g _{d s 2} )}{g _{d s 1} + g _{m 2}^{'} + g _{d s 2}}, g_{m, G 2} = \frac{g _{m 2} g _{d s 1}}{g _{d s 1} + g _{m 2}^{'} + g _{d s 2}}$	$g_{m 2}^{'} = g_{m 2} + g_{mb 2} = (1 + η) g_{m 2}$	$g_{m, G 1}, g_{m, G 2} : t r an sco n d u c t an ce f r o m g a t e 1 an d g a t e 2 t o t h e d r ain c u r r e n t$ $g_{m 1}, g_{m 2}, g_{d s 1}, g_{d s 2} : t r an sco n d u c t an ce an d o u tp u t co n d u c t an ce o f M_{1} an d M_{2}$ $g_{m 2}^{'} : M_{2} t r an sco n d u c t an ce in c l u d in g t h e b o d y e f f ec t (see L o n g C hann e l M O S F E T p a g e)$
Output conductance and resistance	$g_{o u t} = \frac{g _{d s 1} g _{d s 2}}{g _{d s 1} + g _{d s 2} + g _{m 2}^{'}}$	$r_{o u t} = r_{o 1} + r_{o 2} + g_{m 2}^{'} r_{o 1} r_{o 2} \approx g_{m 2}^{'} r_{o 1} r_{o 2}$	$r_{o 1}, r_{o 2} : o u tp u t r es i s t an ces o f M_{1} an d M_{2}$ $(cascode: the output resistance is boosted by the gain of M_{2})$
Node gain and Miller input capacitance	$A_{X} = \frac{Δ V _{X}}{Δ V _{G 1 S}} = - \frac{g _{m 1}}{g _{d s 1} + g _{m 2}^{'} + g _{d s 2}} \approx - \frac{g _{m 1}}{g _{m 2}^{'}}$	$C_{in} = C_{g s 1} + C_{g d 1} (1 - A_{X})$	$A_{X} : s ma l l - s i g na l v o l t a g e g ain f r o m g a t e 1 t o t h e in t er na l n o d e$ $C_{in} : e f f ec t i v e in p u t c a p a c i t an ce see n a t g a t e 1$ $C_{g s 1}, C_{g d 1} : g a t e - so u r ce an d g a t e - d r ain c a p a c i t an ces o f M_{1} (see L o n g C hann e l M O S F E T p a g e)$ $(the direct G_{1} -to-drain coupling is small because G_{2} shields it)$
Mixing and conversion transconductance	$g_{mi x} = \frac{\partial ^{2} I _{D}}{\partial V _{G 1 S} \partial V _{G 2 S}}, g_{c} = \frac{g _{mi x} V _{L O}}{2}$	$i_{I F} = g_{mi x} v_{R F} v_{L O} = \frac{g _{mi x} V _{R F} V _{L O}}{2} [cos (ω_{R F} - ω_{L O}) t + cos (ω_{R F} + ω_{L O}) t]$	$g_{mi x} : cr oss (seco n d - or d er) t r an sco n d u c t an ce co u pl in g t h e tw o g a t es$ $g_{c} : co n v er s i o n t r an sco n d u c t an ce (I F c u r r e n t am pl i t u d e p er u ni t R F v o l t a g e am pl i t u d e)$ $V_{R F}, V_{L O} : s i g na l am pl i t u d es a t g a t e 1 an d g a t e 2$ $(small-signal expansion about the bias point)$
Velocity-saturated (short-channel) form	$g_{m 1} = Z_{1} C_{o x} v_{s a t}, f_{T} \approx \frac{v _{s a t}}{2 π L _{1}}$	$(see Short Channel MOSFET page)$	$(for short gates, replace the square-law g_{m 1} in the small-signal rows above; the intrinsic speed of the input is set by M_{1})$

Important Questions

Ques: Why is a dual-gate MOSFET modeled as two MOSFETs in series, and how is it different from a double-gate MOSFET?

In a dual-gate device the two gates sit one after the other along the channel, so current must flow through the part of the channel controlled by $G_{1}$ and then through the part controlled by $G_{2}$ . The channel potential at the boundary, $V_{X}$ , is the source of the second device and the drain of the first, which is why the same current $I_{D}$ appears in both equations and $V_{D S} = V_{D S 1} + V_{D S 2}$ . A double-gate (parallel-gate) transistor is completely different: both gates act on the same cross-section of the channel from opposite faces, which improves electrostatic control and is treated on the Double-Gate MOSFET page. A useful check on the series model is the tied-gate limit: with $V_{G 1 S} = V_{G 2 S}$ the pair must reproduce a single long-channel MOSFET of length $L_{1} + L_{2}$ , and for equal devices the two relations do give $I_{D} = (β /4) V_{o v}^{2}$ , with $V_{X} = (1 - 1/ 2) V_{o v}$ . Reference: B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001; Y. Taur and T.H. Ning, Fundamentals of Modern VLSI Devices, 2nd ed., Cambridge University Press, 2009.

Ques: Why does a dual-gate MOSFET have lower feedback capacitance and higher output resistance than a single-gate device?

Gate 2 acts as a shield between gate 1 and the drain. The drain voltage is only felt by $M_{2}$ , and $M_{2}$ ‘s source node $X$ follows gate 1 with a small gain $A_{X} \approx - g_{m 1} / g_{m 2}^{'}$ (about $- 1$ for similar devices), so the Miller multiplication of $C_{g d 1}$ is limited to $1 - A_{X}$ and the direct gate 1 to drain coupling is very small. This reduced reverse transfer capacitance improves stability and lets the input and output be matched almost independently at RF. At the output, the same stacking gives the cascode result $r_{o u t} \approx g_{m 2}^{'} r_{o 1} r_{o 2}$ , much larger than a single device’s $r_{o}$ . Reference: B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001; P.R. Gray, P.J. Hurst, S.H. Lewis, and R.G. Meyer, Analysis and Design of Analog Integrated Circuits, 5th ed., Wiley, 2009.

Ques: How does gate 2 control the gain of the device (automatic gain control)?

With $G_{2}$ biased high, both devices are saturated and $g_{m, G 1} \approx g_{m 1}$ , the full gain of the input device. Lowering $V_{G 2 S}$ lowers $V_{X}$ , until $V_{X} < V_{o v 1}$ and $M_{1}$ enters the triode region, where $g_{m 1} = β_{1} V_{X}$ falls with $V_{X}$ and the channel conductance $g_{d s 1}$ rises. Both effects reduce $g_{m, G 1} = g_{m 1} (g_{m 2}^{'} + g_{d s 2}) / (g_{d s 1} + g_{m 2}^{'} + g_{d s 2})$ , so the gain from $G_{1}$ decreases smoothly as $V_{G 2 S}$ is reduced. Because the control voltage is applied to a separate gate with almost no loading of the signal path, it provides a convenient way of adjusting the gain over a wide range without affecting the input matching as strongly as changing the bias of a single gate would. Reference: S.A. Maas, Microwave Mixers, 2nd ed., Artech House, 1993.

Ques: How can a dual-gate MOSFET act as a mixer?

In the triode region, a MOSFET’s current is proportional to a product of gate overdrive and drain-source voltage, $I_{D} = β [V_{o v} V_{D S} - V_{D S}^{2} /2]$ . In a dual-gate device, the “drain-source voltage” of $M_{1}$ is the node voltage $V_{X}$ and is itself set by gate 2, so the current contains a term proportional to the product of the signals on the two gates. Expanding $I_{D}$ about the bias point, this cross term is $g_{mi x} v_{R F} v_{L O}$ with $g_{mi x} = \partial^{2} I_{D} / \partial V_{G 1 S} \partial V_{G 2 S}$ , and the product of two cosines gives sum and difference frequencies with amplitude $g_{mi x} V_{R F} V_{L O} /2$ . The conversion transconductance is therefore $g_{c} = g_{mi x} V_{L O} /2$ . Applying the RF signal to $G_{1}$ and the local oscillator to $G_{2}$ also provides natural isolation between the two ports, since $G_{2}$ shields $G_{1}$ from the drain. Reference: S.A. Maas, Microwave Mixers, 2nd ed., Artech House, 1993.

Ques: What does the dual-gate structure cost compared with a single-gate device?

The pair needs more drain voltage to stay in saturation, $V_{D S, min} = V_{G 2 S} - V_{T H 2}$ , which reaches $V_{o v 1} + V_{o v 2}$ when $M_{1}$ is just saturated, so the headroom is the sum of two overdrive voltages rather than one. The upper device $M_{2}$ also has a raised threshold, $V_{T H 2} (V_{X})$ , because its source sits above the substrate, and its effective transconductance is $g_{m 2}^{'} = (1 + η) g_{m 2}$ in the small-signal equations. The extra channel length of the two gates in series adds resistance and, in practice, a second device’s noise contribution, so a single-gate stage is preferred where gain control, isolation, or mixing are not needed. Reference: P.R. Gray, P.J. Hurst, S.H. Lewis, and R.G. Meyer, Analysis and Design of Analog Integrated Circuits, 5th ed., Wiley, 2009.

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