1. Theory

  • Definition: A MOSFET is a four-terminal field-effect transistor in which a gate voltage, applied across a thin oxide, induces a conducting inversion channel between source and drain.
  • Reference device: This page uses an n-channel enhancement-mode MOSFET on a uniformly doped p-type substrate; a PMOS follows with , , and all polarities reversed.
  • Long-channel assumptions: Channel length is much larger than the source/drain depletion widths, mobility is field-independent and the gradual-channel approximation holds, so short-channel effects are negligible.
  • MOS capacitor regimes: As gate voltage rises, the surface goes from accumulation to depletion, then weak inversion, then strong inversion at .
  • Threshold voltage: (with the depletion charge), set by the work-function difference, oxide charge, substrate doping and oxide thickness.
  • Body effect: A source-substrate reverse bias widens the depletion region and raises ; the substrate acts as a weak second gate.
  • Unipolar, voltage-controlled: Only electrons carry the channel current, and the insulated gate draws no DC current.

2. Working Principle

  • Cut-off and subthreshold: Below a small diffusion current flows that rises exponentially with , with a swing of at least about 60 mV/dec at 300 K.
  • Linear (triode) region: For small the channel acts as a gate-controlled resistor, .
  • Pinch-off and saturation: When reaches the inversion charge vanishes at the drain end; extra drain voltage drops across the pinched-off region and current saturates.
  • Square-law saturation current: , with a bulk-charge factor correcting for depletion charge along the channel.
  • Channel-length modulation: The pinched-off region grows with , shortening the channel and giving a finite output resistance (set by ).
  • Speed: scales as , so long channels are slow but have high intrinsic gain.

3. Applications

  • CMOS logic and memory: Complementary NMOS/PMOS pairs are the basis of essentially all digital ICs.
  • Precision analog circuits: Long channels give high output resistance, good matching and lower noise for current mirrors, bias networks and op-amp input pairs.
  • Analog switches and sample-and-hold circuits: Near-zero gate current and bidirectional conduction make an ideal voltage-controlled switch.
  • Mature-node mixed-signal ICs: Power-management, sensor-interface and automotive ICs built at 180 nm and above, where long-channel behaviour applies.
NameFormulaRelated FormulaeVariables/Constants
Gate oxide capacitance

Fermi potential


Surface potential regimes
Maximum depletion width

Flat-band voltage




Threshold voltage
Body effect

Inversion charge (charge-sheet)

Linear-region drain current (square-law)


Channel conductance and on-resistance
Saturation drain voltage
Saturation drain current (square-law)


Transconductance
Body transconductance

Output conductance (channel-length modulation)

Channel-length modulation
Subthreshold drain current

Subthreshold swing

Gate capacitance (strong inversion)

Cutoff frequency
Intrinsic voltage gain (saturation)

Important Questions

Ques: Why does strong inversion begin at a surface potential of ?

In a p-type substrate the hole concentration far from the surface is , which sits above the intrinsic level in the Fermi-potential sense. When the surface potential reaches , the electron concentration at the surface equals the bulk hole concentration (the intrinsic level at the surface crosses the Fermi level). Because carrier concentrations depend exponentially on band bending, the surface electron concentration only becomes comparable to , and a substantial mobile electron layer builds up, when the bands bend by a further , giving the usual threshold criterion . Beyond this point nearly all additional gate charge goes into mobile inversion charge, so the depletion width stays at its maximum value . Reference: S.M. Sze and Kwok K. Ng, Physics of Semiconductor Devices, 3rd ed., Wiley, 2007.

Ques: What does “pinch-off” mean in a MOSFET, and why does the drain current saturate?

The channel potential rises from at the source to at the drain, so the voltage between the gate and the channel, and therefore the inversion charge , is smallest at the drain end. When reaches , goes to zero at the drain end (pinch-off). Current does not stop, because carriers reaching the pinch-off point are injected into the high-field depleted region next to the drain and swept across it. Beyond the extra drain voltage is dropped across this short region, while the voltage across the inverted channel stays at about , so the current stays nearly constant. The small remaining slope is the channel-length modulation described by . The mechanism is similar to JFET pinch-off (see the JFET page), but in a JFET the channel is closed by the gate depletion regions, whereas in a MOSFET the inversion layer itself vanishes. Reference: S.M. Sze and Kwok K. Ng, Physics of Semiconductor Devices, 3rd ed., Wiley, 2007.

Ques: What is the body effect, and why does it change the threshold voltage?

A positive source-substrate bias on an NMOS device widens the depletion region under the channel, because the inversion layer is now separated from the substrate by a larger reverse bias. The extra depletion charge must be balanced by additional gate charge, so a larger gate voltage is needed to reach inversion, and increases. The size of the shift is set by , which grows with substrate doping and with oxide thickness. The same dependence means that the substrate behaves as a second, weaker gate, which gives the body transconductance . Reference: S.M. Sze and Kwok K. Ng, Physics of Semiconductor Devices, 3rd ed., Wiley, 2007.

Ques: When should the square-law model be used versus the bulk-charge model?

The square-law model assumes that the depletion charge is constant along the channel, which makes a simple quadratic function of and needs only and . The bulk-charge model keeps the increase in depletion charge toward the drain, so it predicts a lower drain current and a larger -dependence on doping and oxide thickness. The square-law form is adequate for hand analysis and first-pass circuit design, while the bulk-charge form (or the factor in the saturation current) should be used when predicting behavior from doping and oxide thickness. Both are long-channel models and break down once velocity saturation and other short-channel effects become important. Reference: S.M. Sze and Kwok K. Ng, Physics of Semiconductor Devices, 3rd ed., Wiley, 2007.

Ques: Why does the MOSFET still conduct below threshold, and what limits the subthreshold swing?

Below the surface is in weak inversion: there are few mobile electrons, but the source-channel barrier is still lowered by the gate voltage. The resulting current is dominated by diffusion, not drift, and depends exponentially on . Only the fraction of a change in gate voltage appears as a change in surface potential, since the rest is dropped across the oxide and depletion capacitances in series. This capacitive divider sets the swing , whose thermal lower limit of about 60 mV/dec at room temperature cannot be beaten by reducing alone. Reference: S.M. Sze and Kwok K. Ng, Physics of Semiconductor Devices, 3rd ed., Wiley, 2007.

Related pages in this vault: Junction Field Effect Transistor (JFET), Short Channel MOSFET, Metal Semiconductor Field Effect Transistor (MESFET), Schottky Barrier and Dynamic Threshold_MOSFET, MOS Capacitor, SPICE Level 1-3 MOSFET Models, BSIM3 and BSIM4, Surface-Potential Models (PSP and HiSIM), CMOS Logic Transistors, Thermal Oxidation Furnace.