Double-Gate MOSFET

1. Theory

• Definition: A double-gate MOSFET is a transistor in which two gates, on opposite faces of a thin silicon film, control the same channel in parallel.
• Not the dual-gate MOSFET: Its gates act across the film thickness, whereas the dual-gate MOSFET’s two gates sit in series along the channel.
• Foundation of multi-gate devices: Its electrostatics are reused, with different geometry, by the FinFET, tri-gate and gate-all-around pages.
• Shielding from both sides: Both faces of the film are held by gates, so drain field lines are screened and the scale length shrinks to $\lambda \approx {\ell }_{SOI}/\sqrt{2}$.
• Undoped film: Avoids random dopant fluctuation and impurity scattering; the threshold is set by the gate work function, not body doping.
• Volume inversion: At low gate voltage, carriers spread through the whole film thickness rather than sitting at the interfaces.
• Quantum confinement: In thin films, carriers occupy discrete subbands, raising $V_{TH}$ roughly as $1/t_{Si}^2$.

2. Working Principle

• Symmetric operation: Both gates are tied together, giving an effective gate capacitance of $2C_{ox}$ and a body factor $m\approx 1$.
• Near-ideal swing: The undoped, fully depleted film has no depletion-capacitance divider, so the long-channel swing approaches 60 mV/dec.
• Short-channel control: Roll-off and DIBL fall as $\exp (-L/2\lambda )$; gate lengths down to about $5\lambda$ to $6\lambda$ are usable.
• Drain current: Both surface channels conduct in strong inversion, roughly doubling the current of a single-gate device of the same width.
• Independent-gate operation: A separate voltage on gate 2 shifts the threshold seen by gate 1, with much stronger coupling than an SOI back gate because the second oxide is thin.
• Threshold variation: Film-thickness variation, through quantum confinement, becomes the main source of $V_{TH}$ spread.

3. Applications

• Current status: Planar double-gate MOSFETs are mainly a research and modelling structure; in production the double-gate idea appears as the FinFET.
• Basis for FinFET and GAA logic: Its scale-length and volume-inversion results underpin the design of all multi-gate CMOS.
• Independent-gate circuits (research): Tunable-threshold logic, mixers and low-power circuits that exploit the second gate.

Name	Formula	Related Formulae	Variables/Constants
Potential across the film (volume inversion)	$\psi (x)={\psi }_0-\frac{2k_{B}T}{q}\ln \cos \left(\beta x\right)$	$\begin{array}{r}{\beta }^2=\frac{q^2{n}_i}{2{\epsilon }_s{k}_{B}T}\exp \left(\frac{q\left({\psi }_0-V_{ch}\right)}{k_{B}T}\right)\\ \text{(from Poisson’s equation with mobile electrons only)}\end{array}$	$\begin{array}{r}x:\text{distance from the film mid-plane}\\ \left(-\frac{t_{Si}}{2}\le x\le \frac{t_{Si}}{2}\right)\end{array}$ $\begin{array}{r}{\psi }_0:\text{potential at the mid-plane}\\ V_{ch}:\text{quasi-Fermi (channel) potential}\end{array}$ $\begin{array}{r}{n}_i:\text{intrinsic carrier concentration}\\ \text{(see Basic Semiconductor Equations page)}\end{array}$ $k_B:Boltzmannconstant$
Surface potential	${\psi }_s={\psi }_0-\frac{2k_{B}T}{q}\ln \cos \left(\frac{\beta t_{Si}}{2}\right)$	$E_s=\frac{2k_{B}T}{q}\beta \tan \left(\frac{\beta t_{Si}}{2}\right)$	$\begin{array}{r}{\psi }_s:\text{potential at the film-oxide interface}\\ E_s:\text{electric field at the interface}\end{array}$ $k_B:Boltzmannconstant$
Gate voltage relation (exact, undoped film)	$V_{GS}-V_{FB}={\psi }_s+\frac{2{\epsilon }_s{k}_{B}T\beta }{q{C}_{ox}}\tan \left(\frac{\beta t_{Si}}{2}\right)$	$\begin{array}{r}{\epsilon }_s{E}_s=C_{ox}\left(V_{GS}-V_{FB}-{\psi }_s\right)\\ \text{(Gauss’s law at the oxide)}\end{array}$	$\begin{array}{r}{V}_{FB}:\text{flat-band voltage}\\ C_{ox}:\text{oxide capacitance per unit area}\\ \text{of each gate}\end{array}$ $\begin{array}{r}\text{(the three rows above give}{\psi }_0,{\psi }_s\text{and the}\\ \text{carrier density for any}{V}_{GS}\text{)}\end{array}$ $k_B:Boltzmannconstant$
Flat-band and threshold voltage (undoped film)	$V_{FB}={\varphi }_M-\left({\chi }_s+\frac{E_g}{2q}\right)$	$\begin{array}{r}{V}_{TH}\approx V_{FB}+\frac{E_g}{2q}\\ \text{(threshold when}\\ E_C\text{approaches}{E}_F\text{at the mid-plane)}\end{array}$	$\begin{array}{r}{\varphi }_M:\text{gate work function}\\ {\chi }_s,E_g:\text{electron affinity and bandgap}\\ \text{(see Constants and Material Values)}\end{array}$ $\begin{array}{r}\text{(the threshold is set by the gate work}\\ \text{function rather than by doping;}\\ \text{approximate rule of thumb)}\end{array}$
Natural length (symmetric double gate)	$\lambda =\sqrt{\frac{{\epsilon }_s}{2{\epsilon }_{ox}}\left(1+\frac{{\epsilon }_{ox}{t}_{Si}}{4{\epsilon }_s{t}_{ox}}\right)t_{Si}{t}_{ox}}$	$\begin{array}{r}\lambda \approx \frac{{\ell }_{SOI}}{\sqrt{2}}\\ {\ell }_{SOI}=\sqrt{\frac{{\epsilon }_s}{{\epsilon }_{ox}}{t}_{ox}{t}_{Si}}\\ \text{(see Silicon-on-Insulator MOSFET page)}\end{array}$	$\begin{array}{r}\lambda :\text{length over which the drain and source}\\ \text{potentials penetrate into the channel}\end{array}$ $\begin{array}{r}\text{(the approximation neglects the}\\ \text{correction term in brackets)}\end{array}$
Short-channel behavior and gate-length rule	$\Delta V_{TH},{\eta }_{DIBL}\propto \exp \left(-\frac{L}{2\lambda }\right)$	$\begin{array}{r}L\gtrsim 5\text{to}6\lambda \text{(rule of thumb)}\\ \text{(see Short Channel MOSFET page)}\end{array}$	$\begin{array}{r}\Delta V_{TH}:\text{threshold roll-off}\\ {\eta }_{DIBL}:\text{drain-induced barrier lowering}\end{array}$ $\begin{array}{r}\text{(thin film and thin oxide give}\\ \text{a short}\lambda \text{and allow shorter gates)}\end{array}$
Quantum-confinement subband energy	$E_1=\frac{{\pi }^2{\hslash }^2}{2m^{\ast }{t}_{Si}^2}$	$\Delta V_{TH}\approx \frac{E_1}{q}$	$\begin{array}{r}{E}_1:\text{lowest subband energy in the film}\\ \text{(infinite-well approximation)}\end{array}$ $\begin{array}{r}{m}^{\ast }:\text{effective mass in the confinement}\\ \text{direction}\end{array}$ $\begin{array}{r}\text{(threshold rises as}{t}_{Si}^{-2}\text{when the film}\\ \text{is thinned)}\end{array}$
Drain current (long channel, strong inversion)	$I_D={\mu }_n\left(2C_{ox}\right)\frac{Z}{L}\left[\left(V_{GS}-V_{TH}\right)V_{DS}-\frac{V_{DS}^2}{2}\right]$	$\begin{array}{r}{I}_{Dsat}={\mu }_n{C}_{ox}\frac{Z}{L}{\left(V_{GS}-V_{TH}\right)}^2\\ \text{(see Long Channel MOSFET page)}\end{array}$	$\begin{array}{r}\text{(both gates contribute, so the effective}\\ \text{gate capacitance is}2C_{ox}\text{and the body}\\ \text{factor is}m\approx 1\text{)}\end{array}$
Ideal long-channel subthreshold swing	$S\to \ln (10)\frac{k_{B}T}{q}\approx 60mV/dec$	$\begin{array}{r}m=1\\ \text{(no depletion-capacitance divider in an undoped film)}\end{array}$	$\begin{array}{r}\text{(valid for}L\gg \lambda \text{; compare the Long Channel}\\ \text{MOSFET page,}S=\ln (10)(k_{B}T/q)(1+C_d/C_{ox})\text{)}\end{array}$ $k_B:Boltzmannconstant$
Independent-gate threshold coupling	$\Delta V_{TH1}=-{\alpha }_{DG}\Delta V_{G2}$	$\begin{array}{r}{\alpha }_{DG}=\frac{C_{Si}{C}_{ox2}}{C_{ox1}\left(C_{Si}+C_{ox2}\right)}\\ C_{Si}=\frac{{\epsilon }_s}{t_{Si}}\\ \text{(same form as the Silicon-on-Insulator MOSFET page)}\end{array}$	$\begin{array}{r}{\alpha }_{DG}:\text{coupling of gate 2 to the threshold}\\ \text{of gate 1 (fully depleted film)}\end{array}$ $\begin{array}{r}{C}_{ox1},C_{ox2}:\text{oxide capacitances of the two gates}\\ \text{(gate 2 plays the role of the back gate,}\\ \text{with}{C}_{ox2}\text{in place of}{C}_{BOX}\text{)}\end{array}$

Important Questions

Ques: Why does a double-gate structure give better short-channel control than a single gate?

In a single-gate device the potential in the channel far from the gate is controlled mainly by the drain and source, so field lines from the drain terminate on the channel and lower the barrier near the source. With a second gate on the opposite face, both faces of a thin film are held at the gate potential, so the drain field lines are shielded from both sides and the film is controlled throughout its thickness. This shows up in the scale length: $\lambda \approx {\ell }_{SOI}/\sqrt{2}$ (before the small correction term), so for the same film and oxide thickness the double-gate device allows a gate length shorter by about $\sqrt{2}$, and the threshold roll-off and DIBL, which fall as $\exp (-L/2\lambda )$, are correspondingly smaller. Thinning the film and oxide shortens $\lambda$ further. Reference: K. Suzuki, T. Tanaka, Y. Tosaka, H. Horie, and Y. Arimoto, “Scaling theory for double-gate SOI MOSFET’s,” IEEE Trans. Electron Devices 40, 2326 (1993); Y. Taur and T.H. Ning, Fundamentals of Modern VLSI Devices, 2nd ed., Cambridge University Press, 2009.

Ques: What is volume inversion, and when does it matter?

In an undoped symmetric film at low gate voltage, the potential profile $\psi (x)={\psi }_0-(2k_{B}T/q)\ln \cos (\beta x)$ is almost flat, so the electron density is highest near the mid-plane and spread across the whole film instead of confined to a thin layer at each interface. This is volume inversion. It reduces scattering from the oxide interfaces and raises the effective mobility at low overdrive; at high gate voltage the field pushes the carriers toward the two surfaces and the device behaves like two parallel surface channels, which is why the strong-inversion current is just the two-gate sum $2C_{ox}$ of the long-channel expression. Because the confinement is strong in thin films, the carriers also occupy discrete subbands, with the lowest energy $E_1={\pi }^2{\hslash }^2/(2m^{\ast }{t}_{Si}^2)$ pushing the threshold up as $t_{Si}$ is reduced. Reference: Y. Taur, “An analytical solution to a double-gate MOSFET with undoped body,” IEEE Electron Device Lett. 21, 245 (2000).

Ques: Why is the film usually undoped, and what does that do to the threshold voltage?

Doping a very thin film leaves only a handful of dopant atoms in the channel, so the threshold voltage varies from device to device by random dopant fluctuation, and doping also reduces mobility through impurity scattering. An undoped film avoids both, but then the threshold can no longer be set by body doping as in the Long Channel MOSFET page. Instead the flat-band voltage $V_{FB}={\varphi }_M-({\chi }_s+E_g/2q)$ is adjusted through the gate work function (a midgap-type metal gives $V_{FB}\approx 0$ and $V_{TH}\approx E_g/2q$), which is why metal gates with a tunable work function are used. The threshold is then sensitive to the film thickness through the quantum-confinement shift $E_1/q\propto t_{Si}^{-2}$, so thickness control is the main source of threshold variation. Reference: Y. Taur and T.H. Ning, Fundamentals of Modern VLSI Devices, 2nd ed., Cambridge University Press, 2009; J.-P. Colinge, FinFETs and Other Multi-Gate Transistors, Springer, 2008.

Ques: How do symmetric and independent double-gate operation differ?

In symmetric operation both gates are tied together, so the device has $2C_{ox}$ of gate control and the best electrostatics. In independent-gate operation, gate 1 drives the device while gate 2 receives a separate voltage; for a fully depleted film the threshold of gate 1 shifts by $-{\alpha }_{DG}\Delta V_{G2}$, where ${\alpha }_{DG}$ has the same form as the back-gate coupling of the Silicon-on-Insulator MOSFET page with $C_{ox2}$ replacing $C_{BOX}$. Because the second oxide is thin, this coupling is much larger than for a thick buried oxide, giving strong threshold control from the second gate, which can be used to tune the speed-leakage trade-off or for logic and mixing functions. Reference: J.-P. Colinge, FinFETs and Other Multi-Gate Transistors, Springer, 2008.

Related pages in this vault: Fin Field Effect Transistor (FinFET), Silicon on Insulator (SOI) MOSFET, Tri-Gate MOSFET, Short Channel MOSFET, Long Channel MOSFET, Multi-Gate Models (BSIM-CMG and BSIM-IMG), Basic Semiconductor Equations, Floating Body Random Access Memory (Capacitorless 1T DRAM), CMOS Logic Transistors.