1. Theory

Definition: Wire capacitance is the capacitance per unit length of an interconnect line to the planes above and below and to its neighbours, set by the geometry and the permittivity of the surrounding dielectric; with resistance it sets interconnect delay and switching energy (Rius; Besser).
Fringe and coupling: At the aspect ratios of modern wires the fringe field from the sidewalls and top exceeds the parallel-plate part, and at tight pitch the coupling to neighbours becomes the largest component (Rius; background knowledge for the pitch trend).
Closed-form models: Formulas such as Sakurai-Tamaru give the capacitance to ground within about 6 per cent, and field-based 3D models within about 5 per cent of numerical solvers (Rius; Zhang et al.).
Low-k dielectrics: Carbon-doped oxides and porous SiCOH lower the permittivity from about 4 for SiO2 to about 2.4 to 3, and air gaps lower the effective value further, by 17 per cent in capacitance at Intel’s 14 $nm$ node (Besser; Natarajan et al.; background knowledge for the values).
Trade-offs: Lower permittivity comes with lower mechanical strength, sensitivity to plasma damage and weaker dielectric reliability (Besser; Lionti et al.).

2. Working Principle

Field partition: Field lines leave the bottom of a line toward the plane below, the sidewalls toward neighbours and the plane, and the top toward the plane above; each path contributes in parallel, and thicker lines raise the sidewall and coupling parts (Rius; Zhang et al.).
Polarization in low-k films: Replacing Si-O bonds with less polarizable Si-CH3 groups and adding pores reduces the electronic and orientational polarization per volume, lowering the permittivity (background knowledge).
Effective permittivity: Etch stops, caps and damaged sidewalls with higher permittivity sit in series and parallel with the low-k film, so the effective value of the stack exceeds that of the bulk film (Besser).
Air gaps: Removing dielectric between closely spaced lines and pinching off the gap under a cap puts the highest-field region, between neighbours, in air with permittivity 1 (Nitta et al.; Natarajan et al.).

3. Applications

Delay and power estimation: Wire capacitance per length for RC delay, switching power and crosstalk analysis; on the RC Delay and Crosstalk pages (background knowledge).
Low-k integration: Choice of ULK films of k about 2.4 to 2.55 and thin etch stops in the tight-pitch layers (Besser; Kioussis, Sun et al.).
Air-gapped layers: Selective air gaps at performance-critical tight-pitch layers, such as the 80 and 160 $nm$ pitch layers of Intel’s 14 $nm$ process (Natarajan et al.).
Intentional capacitors: The same coupling capacitance, used deliberately, forms MOM capacitors; on the MIM and MOM Capacitors page (MIM and MOM Capacitors page).

Capacitance Formulas

Name	Formula	Related Formulae	Variables/Constants
Capacitance of a line over a ground plane (Sakurai-Tamaru)	$\frac{C _{g}}{ε} \approx 1.15 \frac{w}{h} + 2.80 (\frac{t}{h})^{0.222}$	$\frac{C _{pp}}{ε} = \frac{w}{h} (w ≫ h)$	$C_{g} : c a p a c i t an ce p er u ni t l e n g t h o f an i so l a t e d l in e t o t h e g r o u n d pl an e$ $ε : p er mi tt i v i t y o f t h e d i e l ec t r i c$ $w : l in e w i d t h$ $t : l in e t hi c k n ess$ $h : d i e l ec t r i c h e i g h t ab o v e t h e pl an e$ $C_{pp} : p a r a l l e l - pl a t e p a r t; R i u s : t h e S ak u r ai f or m u l a co v er s b o t h p a r a l l e l - pl a t e an d f r in g e p a r t s w i t h ab o u t 6 p er ce n t a cc u r a cy f or 0.3 t o 30 in w / h an d t / h, a g ain s t 6 p er ce n t f or M e ij s (w / h 0.3 t o 10), 2 p er ce n t f or C h u an g (0.1 t o 10) an d 0.01 p er ce n t f or N g u y e n (t / h u p t o 1), w i t h t h e s im pl er E l ma sr y an d Y u an f or m s l ess a cc u r a t e, an d a l l a ss u min g a p er f ec t m e t a l g r o u n d, so a se mi co n d u c t or g r o u n d n ee d s a cor r ec t i o n$ $(co m p u t e d : f or w = t = h t h e f or m u l a g i v es 3.95 ε, o f w hi c h t h e p a r a l l e l - pl a t e p a r t ε w / h i s o n l y 25 p er ce n t; w i t h k = 2.5 t ha t i s 0.087 fF/ μ m)$
Coupling capacitance to a neighbouring line	$\frac{C _{c}}{ε} \approx [0.03 \frac{w}{h} + 0.83 \frac{t}{h} - 0.07 (\frac{t}{h})^{0.222}] (\frac{s}{h})^{- 1.34}$	$C_{t o t} = C_{g, u p} + C_{g, d o w n} + 2 C_{c}$	$C_{c} : co u pl in g c a p a c i t an ce p er u ni t l e n g t h t o o n e n e i g hb o u r a t s p a c in g s$ $C_{t o t} : t o t a l c a p a c i t an ce o f a l in e b e tw ee n tw o n e i g hb o u r s an d tw o pl an es$ $C_{g, u p}, C_{g, d o w n} : c a p a c i t an ces t o t h e pl an es ab o v e an d b e l o w (S ak u r ai - T ama r u co u pl in g f or m, ba c k g r o u n d k n o w l e d g e; t h e co u pl in g f or m u l a i s n o t in t h e R i u s n o t e, w hi c h co v er s o n l y g r o u n d c a p a c i t an ce); Z han g e t a l . : 3 D f i e l d - ba se d m o d e l s r e u se t h e s in g l e - l in e e q u a t i o n s f or co u pl in g b y ha l v in g t h e t o t a l an d s u b s t i t u t in g W w i t h T an d H w i t h S /2, an d t h e i r b o tt o m - c a p a c i t an ce m o d e l s t a y s w i t hin 5 p er ce n t o f C O M S O L, f or e x am pl e 0.3454 fF f or a 10 μ m l in e o f 36 nm w i d t h, 65 nm t hi c k n ess an d 50 nm h e i g h t$ $(co m p u t e d : f or w = t = h, C_{c} i s 0.31, 0.79 an d 2.0 ε a t s / h = 2, 1 an d 0.5, so tw o n e i g hb o u r s c a r r y 14, 29 an d 50 p er ce n t o f t h e t o t a l w i t h t h e i so l a t e d g r o u n d t er m (a pp r o x ima t e, m y r e a d in g); f or t / h = 2 an d s = h, C_{c} = 1.61 ε)$

Low-k Dielectrics

Name	Formula	Related Formulae	Variables/Constants
Effective dielectric constant of a layered stack	$k_{e f f} = \frac{\sum _{i} t _{i}}{\sum _{i} t _{i} / k _{i}} (layers in series)$	$k_{e f f} = \frac{C _{m e a s}}{C _{0}} (C_{0} : same geometry in vacuum)$	$k_{e f f} : e f f ec t i v e r e l a t i v e p er mi tt i v i t y o f t h e in t er co nn ec t d i e l ec t r i c$ $t_{i}, k_{i} : t hi c k n ess an d p er mi tt i v i t y o f e a c h l a y er (b u l k l o w - k, e t c h s t o p, c a p, d ama g e d s i d e w a l l)$ $C_{m e a s} : m e a s u r e d c a p a c i t an ce$ $C_{0} : v a c uu m c a p a c i t an ce o f t h e s am e s t r u c t u r e (ser i es f or m, ba c k g r o u n d k n o w l e d g e; r e a l s t a c k s mi x ser i es an d p a r a l l e l p a t h s); B esser : t hinnin g t h e d i e l ec t r i c ba r r i er an d e t c h s t o p t o 5 nm o f N D C r e d u ces k_{e f f} b y ab o u t 7 p er ce n t in m o d e l l in g, p r ocess d ama g e o f t r e n c h s i d e w a l l s an d t o p in t er f a ces c an er a se t h e b e n e f i t o f t h e l o w - k f i l m, c a p a c i t an ce sc a l in g s l o w s b ey o n d 10 nm, an d l in e an d v ia r es i s t an ce a r e e x p ec t e d t o d o mina t e d e l a y a t 7 an d 5 nm; I n t e l 14 nm : l o w - k c a r b o n - d o p e d o x i d e o n 8 o f 13 l a y er s$ $(co m p u t e d : 40 nm o f k = 2.5 w i t h an a ss u m e d 10 nm c a p o f k = 5 g i v es k_{e f f} = 2.78, an d w i t h a 5 nm c a p in t h e s am e h e i g h t 2.63, a 5.3 p er ce n t r e d u c t i o n, c l ose t o B esse r^{'} s 7 p er ce n t)$
Porous low-k films	$k \approx (1 - ϕ) k_{s} + ϕ (linear mixing, first estimate)$	$\frac{k - 1}{k + 2} = (1 - ϕ) \frac{k _{s} - 1}{k _{s} + 2} (Lorentz-Lorenz form)$	$k : p er mi tt i v i t y o f t h e p or o u s f i l m$ $ϕ : p or os i t y (v o l u m e f r a c t i o n o f p or es)$ $k_{s} : p er mi tt i v i t y o f t h e d e n se s k e l e t o n (mi x in g r u l es, ba c k g r o u n d k n o w l e d g e); t y p i c a l v a l u es : S i O 2 ab o u t 3.9 t o 4.2, f l u or ina t e d o x i d e ab o u t 3.6, d e n se S i C O H ab o u t 2.7 t o 3.0 an d p or o u s S i C O H 2.2 t o 2.5 (ba c k g r o u n d k n o w l e d g e); K i o u ss i s, S u n e t a l . : r o b u s t u l t r a - l o w - k f i l m s o f k 2.55 or b e l o w d e v e l o p e d f or t h e 20 nm n o d e an d b ey o n d; B esser : U L K o f 2.4 an d 2.5 in p r o d u c t i o n co m p a r i so n s, a l o w er e l a s t i c m o d u l u s a t l o w er k, an d T D D B d e g r a d in g ab o u t an or d er o f ma g ni t u d e p er g e n er a t i o n a t U L K 2.4; L i o n t i e t a l . : t h e g r o w in g se n s i t i v i t y o f p or o u s l o w - k f i l m s t o pl a s ma d ama g e i s a maj or r o a d b l oc k, a dd r esse d b y r e p ai r an d d ama g e - p r e v e n t i o n s t r a t e g i es in d ama sce n e in t e g r a t i o n$ $(co m p u t e d : a k_{s} = 3.0 s k e l e t o n n ee d s 25 p er ce n t p or os i t y f or k = 2.5 an d 40 p er ce n t f or 2.2 b y l in e a r mi x in g; t h e L or e n t z - L or e n z f or m g i v es 2.29 a t 25 p er ce n t an d n ee d s o n l y 17 an d 29 p er ce n t p or os i t y f or 2.5 an d 2.2)$

Air Gaps

Name	Formula	Related Formulae	Variables/Constants
Air-gap capacitance reduction	$\frac{Δ C}{C} = 1 - \frac{k _{e f f, A G}}{k _{e f f, U L K}}$	$k_{e f f, A G} = (1 - \frac{Δ C}{C}) k_{e f f, U L K}$	$Δ C / C : f r a c t i o na l c a p a c i t an ce r e d u c t i o n$ $k_{e f f, A G}, k_{e f f, U L K} : e f f ec t i v e p er mi tt i v i t y w i t h ai r g a p s an d w i t h t h e l o w - k r e f er e n ce (ba c k g r o u n d k n o w l e d g e f or t h e f or m); I n t e l 14 nm (N a t a r aj an e t a l .) : ai r g a p s a t t h e 80 an d 160 nm minim u m - p i t c h l a y er s g i v e a 17 p er ce n t im p r o v e m e n t in c a p a c i t an ce; B esser : I n t e l^{'} s 14 nm ai r g a p s g a v e R C g ain s o f 14 an d 17 p er ce n t a t 80 an d 160 nm p i t c h, an d a 5 nm co n f or ma l S i C N ba r r i er k ee p s t h e T D D B cr i t i c a l f i e l d co m p a r ab l e t o n o n - ai r - g a pp e d U L K 2.5 in t er co nn ec t s, w i t h A l N pl u s S i C O h er m e t i c a t 3 nm; N i tt a e t a l . : c a p a c i t an ce r e d u c t i o n i s ma x imi z e d b y e x p an d in g t h e g a p in t o t h e S i C O H b e l o w t h e c a p an d b y d ee p er g a p s, w hi l e r es t r i c t e d c a p o p e nin g s p r eser v e m ec hani c a l an d e l ec t r i c a l r e l iabi l i t y$ $(co m p u t e d : 17 p er ce n t a ppl i e d t o an a ss u m e d k_{e f f} o f 2.5 cor r es p o n d s t o an e f f ec t i v e 2.08)$

Important Questions

Ques: How much of a wire’s capacitance to ground comes from the fringe field?

Most of it at modern aspect ratios. The Sakurai-Tamaru formula, $C / ε \approx 1.15 (w / h) + 2.80 (t / h)^{0.222}$ , gives 3.95 times the permittivity for a line whose width, thickness and height above the plane are equal, while the parallel-plate part $w / h$ is only 1, about 25 per cent (computed). With an ultra-low-k dielectric of 2.5 this is 0.087 $fF/ μ m$ (computed). Rius gives the formula an accuracy of about 6 per cent for width and thickness ratios from 0.3 to 30, while Chuang’s more complex formula reaches 2 per cent. All these formulas assume a perfect metal ground plane, so lines over silicon need a correction. The fringe term grows with thickness only as the 0.222 power, so tall lines add capacitance mainly through coupling to their neighbours. Reference: J. Rius, ‘Interconnect capacitances in metal multilayer CMOS technologies. Capacitance to ground’, Technical Note TN-2025-2 (draft), Universitat Politecnica de Catalunya (2025) (formulas partly garbled) (fetch-tool summary).

Ques: How quickly does coupling capacitance grow as the spacing shrinks?

Roughly as the spacing to the power -1.34 in the Sakurai-Tamaru coupling form, $C_{c} / ε \approx [0.03 (w / h) + 0.83 (t / h) - 0.07 (t / h)^{0.222}] (s / h)^{- 1.34}$ (background knowledge). For equal width, thickness and height, one neighbour adds 0.31, 0.79 and 2.0 times the permittivity at spacings of 2, 1 and 0.5 times the height, so two neighbours carry about 14, 29 and 50 per cent of the total when combined with the isolated ground term (computed, approximate). Doubling the thickness at equal spacing raises the coupling to 1.61 times the permittivity (computed). Zhang et al. build 3D models on the same idea, reusing single-line equations with width and thickness exchanged, and stay within 5 per cent of field simulation. Coupling therefore dominates at tight pitch, which is why air gaps target the spaces between lines. Reference: A. Zhang, W. Zhao, Y. Ye, J. He, A. Chen and M. Chan, ‘Field-Based 3D Capacitance Modeling for sub-45-nm On-Chip Interconnect’, NSTI-Nanotech 2012, Vol. 2 (fetch-tool summary); J. Rius, ‘Interconnect capacitances in metal multilayer CMOS technologies. Capacitance to ground’, Technical Note TN-2025-2 (draft), Universitat Politecnica de Catalunya (2025) (formulas partly garbled) (fetch-tool summary).

Ques: Did Intel’s 14 nm air gaps lower capacitance by 17 per cent, or RC by 14 and 17 per cent?

Both statements appear. Natarajan et al. state that air gaps at the 80 and 160 $nm$ minimum-pitch layers provide a 17 per cent improvement in capacitance, without separating the two layers or giving a delay figure. Besser’s later talk attributes RC gains of 14 and 17 per cent at 80 and 160 $nm$ pitch to the same process. Since air gaps change only the capacitance, an RC gain and a capacitance gain should be equal for the same structure (my reading), so the difference lies in the pitch split: the paper’s 17 per cent is probably the better of the two layers or a combined value, and Besser’s 14 per cent applies at the tighter pitch, where less of the gap can be opened (my reading). A 17 per cent reduction corresponds to an effective permittivity of about 2.08 from an assumed 2.5 (computed). Reference: S. Natarajan et al. (Intel), ‘A 14nm Logic Technology Featuring 2nd-Generation FinFET, Air-Gapped Interconnects, Self-Aligned Double Patterning and a 0.0588 um2 SRAM Cell Size’, IEDM 2014, paper 3.7 (fetch-tool summary); P. Besser, ‘BEOL Interconnect Innovations for Improving Performance’, NCCAVS Symposium, San Jose (23 February 2017) (slides) (fetch-tool summary).

Ques: Why is the effective dielectric constant of an interconnect stack higher than that of the low-k film?

Because the stack also contains etch stops, dielectric barriers and caps of higher permittivity, and plasma-damaged sidewalls, all in series and parallel with the low-k film. With a series estimate, 40 $nm$ of k = 2.5 over an assumed 10 $nm$ cap of k = 5 gives an effective 2.78, and halving the cap to 5 $nm$ at the same total height gives 2.63, a 5.3 per cent reduction (computed). Besser reports a modelled 7 per cent reduction for thinning the barrier and etch stop to 5 $nm$ of NDC, close to this simple estimate. He also warns that process-induced damage to trench sidewalls and top interfaces can erase the benefit of the low-k film. Lionti et al. describe this sensitivity of porous films to plasma damage as a major obstacle to integration, which has driven repair and prevention schemes. Reference: P. Besser, ‘BEOL Interconnect Innovations for Improving Performance’, NCCAVS Symposium, San Jose (23 February 2017) (slides) (fetch-tool summary); K. Lionti, W. Volksen, T. P. Magbitang, M. Darnon and G. Dubois, ‘Toward successful integration of porous low-k materials: Strategies addressing plasma damage’, ECS Journal of Solid State Science and Technology (2014), doi:10.1149/2.0081501jss (abstract only).

Ques: Why has the dielectric constant of production low-k films stalled near 2.4 to 2.5?

Because further reduction needs more porosity, which weakens the film. By linear mixing, a skeleton of k = 3.0 needs about 25 per cent porosity for 2.5 and 40 per cent for 2.2, while the Lorentz-Lorenz form needs only about 17 and 29 per cent (computed, background knowledge for the rules), so the two rules bracket the porosity required. Besser notes that lower permittivity generally means a lower elastic modulus, which causes integration and reliability problems, and that TDDB degrades by about an order of magnitude per generation at ULK 2.4. Porous films also absorb plasma damage, which raises their permittivity again, as Lionti et al. review. Kioussis, Sun et al. aimed at robust films of k 2.55 or below for the 20 $nm$ node. Air gaps were adopted instead at selected layers, because they lower capacitance without weakening the whole stack. Reference: P. Besser, ‘BEOL Interconnect Innovations for Improving Performance’, NCCAVS Symposium, San Jose (23 February 2017) (slides) (fetch-tool summary); K. Lionti, W. Volksen, T. P. Magbitang, M. Darnon and G. Dubois, ‘Toward successful integration of porous low-k materials: Strategies addressing plasma damage’, ECS Journal of Solid State Science and Technology (2014), doi:10.1149/2.0081501jss (abstract only); D. R. Kioussis, Z. Sun et al. (GLOBALFOUNDRIES, IBM, Samsung), ‘Developing Robust Ultra-Low-k Dielectric (k 2.55 or below) Materials using Novel Characterization Techniques for the 20nm Node and Beyond’, AVS 59th Symposium, paper EM-TuA8 (2012) (title only).

Ques: How accurate are closed-form interconnect capacitance formulas?

Accurate enough for estimates within their ranges. Rius compares several formulas for the capacitance to ground: Sakurai-Tamaru about 6 per cent for width and thickness ratios of 0.3 to 30, Meijs about 6 per cent for widths of 0.3 to 10 times the height, Chuang 2 per cent for ratios of 0.1 to 10, and Nguyen 0.01 per cent for thickness up to the height, while the simpler Elmasry and Yuan forms show larger errors. Zhang et al.’s field-based 3D model stays within 5 per cent of COMSOL for sub-45 $nm$ wires, with errors from -2.26 to +3.32 per cent, for example 0.3454 $fF$ for a 10 $μ m$ line in both model and simulation. All of these assume ideal ground planes and rectangular lines, so extraction tools remain necessary for sign-off (my reading). Reference: J. Rius, ‘Interconnect capacitances in metal multilayer CMOS technologies. Capacitance to ground’, Technical Note TN-2025-2 (draft), Universitat Politecnica de Catalunya (2025) (formulas partly garbled) (fetch-tool summary); A. Zhang, W. Zhao, Y. Ye, J. He, A. Chen and M. Chan, ‘Field-Based 3D Capacitance Modeling for sub-45-nm On-Chip Interconnect’, NSTI-Nanotech 2012, Vol. 2 (fetch-tool summary).

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Wire Capacitance and Low-k Dielectrics