1. Theory

Definition: A through-silicon via (TSV) is a vertical copper or tungsten conductor through the silicon die, insulated from the substrate by an oxide or low-k liner, that connects stacked dies or the front and back of a die; electrically it is a short wire with series resistance and inductance and a coaxial MOS capacitance to the substrate (Salah et al.; Tan et al.).
Resistance and inductance: A typical copper TSV of 5 $μ m$ diameter and 50 $μ m$ length has tens of milliohms and tens of picohenries, so its series impedance is small up to several GHz (Salah et al.; Luo et al.).
Capacitance: The liner forms a cylindrical capacitor of tens of fF in series with a depletion capacitance in the silicon that depends on bias, so the TSV is a MOS capacitor with a C-V curve (Salah et al.; Tan et al.).
Substrate coupling: Beyond the depletion region the silicon adds a resistance and capacitance to the nearest body contacts, set strongly by their number and distance (Salah et al.).
Liner choice: A thicker or lower-k liner lowers the capacitance, and a compliant low-k liner also reduces thermomechanical stress around the via (Tan et al.).

2. Working Principle

Series path: Current flows along the copper core; at high frequency it crowds to the surface within a skin depth, raising the resistance and lowering the internal inductance, which the two-branch ladder of Salah et al. reproduces (Salah et al.; background knowledge for the skin effect).
MOS action: The TSV, liner and substrate form a cylindrical MOS capacitor: biasing the via relative to a p-type substrate moves the silicon surface from accumulation to depletion, and the depletion layer adds a series capacitance that lowers the total (Tan et al.; MOS Capacitor page).
Substrate return: Displacement current through the liner continues through the resistive silicon to the body contacts or neighbouring ground TSVs, so the substrate acts as a lossy dielectric above its relaxation frequency and a resistor below (Salah et al.; background knowledge for the relaxation picture).
Signal and return pairs: In a ground-signal-ground arrangement the loop inductance is set by the pitch between the signal and return vias, and the line acts as a short vertical transmission line (Luo et al.; On-Chip Transmission Lines page).

3. Applications

3D integration: Vertical signal, power and ground connections between stacked dies in memory stacks and logic-on-memory, where the TSV capacitance sets the I/O power and delay (Salah et al.; background knowledge).
Silicon interposers: Through-interposer connections from the routing layers to the package (background knowledge).
Passive elements: Vertical inductors and coaxial or trench-like capacitors that use the TSV process (background knowledge; Deep-Trench Capacitors page).

Resistance and Inductance

Name	Formula	Related Formulae	Variables/Constants
DC resistance and skin effect of a copper TSV	$R_{D C} = \frac{l _{t s v}}{σ _{c} π r _{t s v}^{2}}, δ = \frac{2}{ω μ _{0} σ _{c}}$	$R_{0} = \frac{330 l n ( 1 + 0.01 l _{t s v} / r _{t s v} )}{2 π σ _{c} r _{t s v}}, R_{1} = \frac{200 l n ( 1 + 0.01 l _{t s v} / r _{t s v} )}{2 π σ _{c} r _{t s v}}$	$R_{D C} : D C r es i s t an ce$ $l_{t s v} : T S V l e n g t h$ $σ_{c} : co pp er co n d u c t i v i t y (5.8 \times 1 0^{7} S/m)$ $r_{t s v} : T S V r a d i u s$ $δ : s k in d e pt h$ $ω : an g u l a r f r e q u e n cy$ $R_{0}, R_{1} : r es i s t an ces o f t h e tw o b r an c h es o f t h e S a l ah e t a l . l a dd er t ha t r e p r o d u ces t h e f r e q u e n cy d e p e n d e n ce (f i tt e d co n s t an t s 330 an d 200); S a l ah e t a l . : f or a t y p i c a l T S V o f 5 μ m d iam e t er, 50 μ m l e n g t h (a s p ec t r a t i o 10) an d 0.3 μ m o x i d e, R_{0} = 63 mΩ an d R_{1} = 38 mΩ, S_{21} w i t hin 1 p er ce n t t y p i c a l l y an d 5 p er ce n t a t m os t u p t o 10 GHz; Lu o e t a l . (G - S - G s t r u c t u r e, d im e n s i o n s w i t hh e l d b y t h e f o u n d r y) : e x t r a c t e d R_{1} o f 269.79 mΩ an d R_{2} o f 39.75 mΩ a g ain s t ana l y t i c a l 231.92 an d 35.01 mΩ, v er i f i e d f r o m 1 t o 50 GHz (u ni f or m - c u r r e n t D C f or m an d s k in d e pt h, ba c k g r o u n d k n o w l e d g e)$ $(co m p u t e d : R_{D C} = 44 mΩ f or t h e S a l ah g eo m e t r y; t h e f i tt e d R_{0} an d R_{1} g i v e 66 an d 40 mΩ, c l ose t o t h e t ab u l a t e d 63 an d 38; δ in co pp er i s 2.1 μ m a t 1 GHz an d 0.66 μ m a t 10 GHz, b e l o w t h e 2.5 μ m r a d i u s)$
Inductance of a TSV	$L_{p} = \frac{μ _{0} l _{t s v}}{2 π} [ln (\frac{2 l _{t s v}}{r _{t s v}}) - \frac{3}{4}] (partial self-inductance, uniform current)$	$L_{0} = \frac{155 μ _{0} r _{t s v}}{2 π} ln (1 + \frac{0.01 l _{t s v}}{r _{t s v}}), L_{1} = \frac{55 μ _{0} r _{t s v}}{2 π} ln (1 + \frac{0.01 l _{t s v}}{r _{t s v}})$	$L_{p} : p a r t ia l se l f - in d u c t an ce o f a s t r ai g h t r o u n d w i r e (ba c k g r o u n d k n o w l e d g e)$ $μ_{0} : p er m e abi l i t y o f f r ee s p a ce$ $L_{0}, L_{1} : in d u c t an ces o f t h e tw o l a dd er b r an c h es o f S a l ah e t a l . (f i tt e d co n s t an t s 155 an d 55), o t h er sy mb o l s a s ab o v e; S a l ah e t a l . : L_{0} = 14 pH an d L_{1} = 5 pH f or t h e 5 μ m b y 50 μ m T S V, u n c han g e d b y t h e n u mb er o f b o d y co n t a c t s; Lu o e t a l . : l oo p in d u c t an ce o f a s i g na l T S V b e tw ee n tw o g r o u n d T S V s d er i v e d b y in t e g r a t in g t h e ma g n e t i c f i e l d o f t h r ee T S V s, 55.06 pH e x t r a c t e d a g ain s t 60.44 pH ana l y t i c a l, w i t h a f u r t h er 4.24 a g ain s t 2.10 pH in t h e r es i s t i v e b r an c h$ $(co m p u t e d : L_{p} = 29 pH f or t h e S a l ah g eo m e t r y; t h e f i tt e d L_{0} an d L_{1} g i v e 14.1 an d 5.0 pH; 14 pH i s 0.44 Ω o f r e a c t an ce a t 5 GHz, ab o u t t e n t im es t h e D C r es i s t an ce)$

Liner and Depletion Capacitance

Name	Formula	Related Formulae	Variables/Constants
Liner oxide capacitance	$C_{o x} = \frac{2 π ε _{0} ε _{o x} l _{t s v}}{l n ( 1 + t _{o x} / r _{t s v} )}$	$C_{o x} \approx \frac{ε _{0} ε _{o x} 2 π r _{t s v} l _{t s v}}{t _{o x}} (t_{o x} ≪ r_{t s v})$	$C_{o x} : c a p a c i t an ce o f t h e co a x ia l l in er$ $ε_{o x} : r e l a t i v e p er mi tt i v i t y o f t h e l in er$ $t_{o x} : l in er t hi c k n ess, o t h er sy mb o l s a s ab o v e (t hin - l in er l imi t, ba c k g r o u n d k n o w l e d g e); S a l ah e t a l . : C_{o x} = 37 fF f or t h e 5 μ m b y 50 μ m T S V w i t h 0.3 μ m S i O 2 o f p er mi tt i v i t y 4; Lu o e t a l . : 80.55 fF e x t r a c t e d a g ain s t 81.36 fF ana l y t i c a l; T an e t a l . : a l o w - k S i O C l in er o f ab o u t 205 nm w i t h k ab o u t 2.8 t o 2.88, a g ain s t 3.9 f or P E T E O S, l o w er e d t h e a cc u m u l a t i o n c a p a c i t an ce o f 5 μ m T S V s ab o u t 10.6 μ m d ee p b y ab o u t 26 p er ce n t a t 100 kHz, w i t h l e ak a g e o f 1.6 \times 1 0^{- 5} A/c m^{2} a t 2 MV/cm w h e n f r es h, b r o ug h t c l ose t o P E T E O S b y a f or min g - g a s ann e a l, an d a m o d u l u s o f 7.2 GPa a g ain s t 75 GPa t ha t r e d u ces n e a r - s u r f a ce s t r ess in t h e s i l i co n b y m or e t han 25 p er ce n t$ $(co m p u t e d : t h e co a x ia l f or m u l a g i v es 98 fF f or t h e S a l ah g eo m e t r y, n o t 37 fF, w hi c h w o u l d n ee d ab o u t 0.85 μ m o f o x i d e (see t h e Q / A); 2.88/3.9 i s a 26 p er ce n t r e d u c t i o n, ma t c hin g T an e t a l .; t h e i r g eo m e t r y g i v es ab o u t 28 fF o f s i d e w a l l c a p a c i t an ce w i t h P E T E O S an d 21 fF w i t h l o w - k)$
Depletion capacitance of the TSV MOS structure	$C_{d e p} = \frac{2 π ε _{0} ε _{s i} l _{t s v}}{l n [ ( r _{t s v} + t _{o x} + W _{d} ) / ( r _{t s v} + t _{o x} ) ]}, \frac{1}{C _{t s v}} = \frac{1}{C _{o x}} + \frac{1}{C _{d e p}}$	$W_{d, ma x} = \frac{4 ε _{0} ε _{s i} ϕ _{F}}{q N _{A}}, ϕ_{F} = \frac{k _{B} T}{q} ln \frac{N _{A}}{n _{i}}$	$C_{d e p} : co a x ia l d e pl e t i o n c a p a c i t an ce$ $ε_{s i} : p er mi tt i v i t y o f s i l i co n$ $W_{d} : d e pl e t i o n w i d t h$ $C_{t s v} : ser i es c a p a c i t an ce o f l in er an d d e pl e t i o n$ $W_{d, ma x} : ma x im u m d e pl e t i o n w i d t h$ $ϕ_{F} : F er mi p o t e n t ia l$ $q : e l e m e n t a r y c ha r g e$ $N_{A} : s u b s t r a t e d o p in g$ $k_{B} : B o l t z mann co n s t an t$ $T : t e m p er a t u r e$ $n_{i} : in t r in s i c c a r r i er d e n s i t y (co a x ia l M O S f or m an d pl ana r ma x im u m w i d t h, ba c k g r o u n d k n o w l e d g e; M O S p h y s i cs o n t h e M O S C a p a c i t or p a g e); S a l ah e t a l . : C_{d e p} = 78 fF an d R_{d e p} = 124 Ω a t 0.3 V, b o t h c han g in g b y m or e t han 100 p er ce n t b e tw ee n 0 an d 1 V, w i t h a L amb er t - W bia s d e p e n d e n ce (g a r b l e d in t h e e x t r a c t); T an e t a l . : C - V c u r v es m o v e f r o m a cc u m u l a t i o n t o d e pl e t i o n w i t h p os i t i v e bia s o n p - t y p e s i l i co n, an d ann e a l in g m o v e d t h e f l a t - ban d v o l t a g e t o w a r d t h e i d e a l - 0.27 V$ $(co m p u t e d : an a ss u m e d 1.3 \times 1 0^{15} c m^{- 3} p - t y p e s u b s t r a t e, ab o u t 10 Ω cm, g i v es ϕ_{F} = 0.30 V an d W_{d, ma x} = 0.78 μ m, C_{d e p} = 133 fF an d C_{t s v} = 56 fF w i t h t h e 98 fF l in er, 57 p er ce n t o f C_{o x})$

Substrate Coupling and Model

Name	Formula	Related Formulae	Variables/Constants
Substrate capacitance and resistance to body contacts	$C_{s i} = \frac{0.5 π ( 8 n _{b c} + 1 ) ε _{0} ε _{s i} l _{t s v}}{l n ( 1 + Δ _{b c} / r _{t s v} )}, R_{s i} = \frac{l n ( 1 + Δ _{b c} / r _{t s v} )}{0.5 π ( 8 n _{b c} + 1 ) σ _{s i} l _{t s v}}$	$R_{s i} C_{s i} = \frac{ε _{0} ε _{s i}}{σ _{s i}}, f_{r e l} = \frac{σ _{s i}}{2 π ε _{0} ε _{s i}}$	$C_{s i}, R_{s i} : s u b s t r a t e c a p a c i t an ce an d r es i s t an ce b e tw ee n t h e T S V an d i t s b o d y co n t a c t s$ $n_{b c} : n u mb er o f b o d y co n t a c t s$ $Δ_{b c} : d i s t an ce t o t h e b o d y co n t a c t s$ $σ_{s i} : s u b s t r a t e co n d u c t i v i t y$ $f_{r e l} : d i e l ec t r i c r e l a x a t i o n f r e q u e n cy; S a l ah e t a l . : w i t h Δ_{b c} = 5 μ m an d 10 S/m s i l i co n o f p er mi tt i v i t y 12, C_{s i} = 7, 68 an d 250 fF an d R_{s i} = 1.4 kΩ, 155 Ω an d 42 Ω f or 0, 1 an d 4 b o d y co n t a c t s, so t h e T S V c a p a c i t an ce d e p e n d s s t r o n g l y o n t h e g r o u n d - co n t a c t p os i t i o n s; Lu o e t a l . : C_{s i} o f 2.60 a g ain s t 3.01 fF an d G o f 0.26 a g ain s t 0.25 mS, o b t ain e d f r o m t h e co n d i t i o n t ha t L C p er u ni t l e n g t h e q u a l s μ t im es t h e e f f ec t i v e p er mi tt i v i t y$ $(co m p u t e d : t h e e x p r ess i o n s r e p r o d u ce 7.6, 68 an d 251 fF an d 1.40 kΩ, 155 an d 42 Ω; R_{s i} C_{s i} = 10.6 ps, so f_{r e l} = 15 GHz f or 10 S/m, ab o v e w hi c h t h e s u b s t r a t e b e ha v es a s a d i e l ec t r i c)$
Lumped TSV model	$Z_{t s v} = R (f) + j ω L (f), Y_{s h} = [\frac{1}{j ω C _{o x}} + \frac{1}{j ω C _{d e p} + 1/ R _{d e p}} + \frac{1}{j ω C _{s i} + 1/ R _{s i}}]^{- 1}$	$S_{21} error < 1 per cent typical, < 5 per cent maximum (0 to 10 GHz)$	$Z_{t s v} : ser i es im p e d an ce o f t h e v ia, R (f), L (f) : f r e q u e n cy - d e p e n d e n t r es i s t an ce an d in d u c t an ce f r o m t h e tw o - b r an c h l a dd er$ $Y_{s h} : s h u n t a d mi tt an ce t h r o ug h l in er, d e pl e t i o n l a y er an d s u b s t r a t e t o g r o u n d, o t h er sy mb o l s a s ab o v e (ser i es co mbina t i o n a s d r a w n, m y r e a d in g o f t h e m o d e l t o p o l o g y); S a l ah e t a l . : t h e m o d e l w a s f i tt e d t o Q 3 D q u a s i - s t a t i c r es u l t s, w hi c h a g r ee d w i t h f u l l - w a v e H F S S w i t hin 5 p er ce n t, an d i s v a l i d f r o m 0 t o 10 GHz; Lu o e t a l . : t h e i r e q u i v a l e n t c i r c u i t a g r ee d w i t h E M s im u l a t i o n w i t hin 0.03 dB in S_{21} an d 2 dB in S_{11}, w i t h s t an d a r d er r or s o f 0.05 an d 0.95 p er ce n t, an d t h e ana l y t i c a l e q u a t i o n s w i t hin 0.18 an d 2.32 p er ce n t$ $(n o co m p u t e d v a l u e)$

Important Questions

Ques: Is the liner capacitance of the Salah et al. TSV 37 fF or 98 fF?

Salah et al. tabulate $C_{o x} = 37$ $fF$ for a TSV of 2.5 $μ m$ radius, 50 $μ m$ length and 0.3 $μ m$ oxide of permittivity 4, but their own coaxial formula, $2 π ε_{0} ε_{o x} l_{t s v} / ln (1 + t_{o x} / r_{t s v})$ , gives 98 $fF$ for these values, and 37 $fF$ would need about 0.85 $μ m$ of oxide (computed). Their substrate values do follow their formulas, reproducing 7.6, 68 and 251 $fF$ and 1.40 $kΩ$ , 155 and 42 $Ω$ for 0, 1 and 4 body contacts (computed), so the formulas and inputs are read correctly. The table value probably comes from a different liner thickness or from the simulation rather than the formula (my reading). Since the coaxial formula is standard, 98 $fF$ is the more likely value for the stated geometry, and 37 $fF$ the value to use only with the Salah simulation. Reference: K. Salah, A. El Rouby, H. Ragai, K. Amin and Y. Ismail, ‘Compact Lumped Element Model for TSV in 3D-ICs’, IEEE (2011), pp. 2321-2324 (venue not named in the text; equations reconstructed from a garbled PDF) (fetch-tool summary).

Ques: Is the inductance of a TSV about 14, 29 or 55 pH?

Each value describes a different quantity. Salah et al. give branch inductances of 14 and 5 $pH$ in a two-branch ladder for a 5 $μ m$ by 50 $μ m$ TSV, a frequency-dependent model rather than a single inductance. The partial self-inductance of a uniform straight wire, $(μ_{0} l /2 π) [ln (2 l / r) - 3/4]$ , is 29 $pH$ for the same geometry (computed, background knowledge for the formula), and depends on the return path once the TSV is in a circuit. Luo et al. extracted 55.06 $pH$ for a signal TSV between two ground TSVs, the loop inductance of the ground-signal-ground structure, against 60.44 $pH$ analytically. For design, the loop value including the actual return vias is the one that matters. At 5 $GHz$ even 14 $pH$ is about 0.44 $Ω$ (computed), ten times the 44 $mΩ$ DC resistance. Reference: K. Salah, A. El Rouby, H. Ragai, K. Amin and Y. Ismail, ‘Compact Lumped Element Model for TSV in 3D-ICs’, IEEE (2011), pp. 2321-2324 (venue not named in the text; equations reconstructed from a garbled PDF) (fetch-tool summary); C.-W. Luo, Y.-C. Wu, J.-Y. Wang and S. S. H. Hsu, ‘RF Modeling of Through Silicon Vias (TSVs) in 3D IC’, Extended Abstracts of SSDM 2010, Tokyo, 239-240 (fetch-tool summary).

Ques: Why does a TSV’s capacitance depend on bias?

Because the copper core, the liner and the silicon form a cylindrical MOS capacitor. On a p-type substrate a negative via voltage accumulates holes at the liner and gives the full liner capacitance, while a positive voltage depletes the surface and adds a depletion capacitance in series. For an assumed $1.3 \times 1 0^{15}$ $c m^{- 3}$ substrate the maximum depletion width is about 0.78 $μ m$ , giving 133 $fF$ of depletion capacitance and a total of 56 $fF$ with the 98 $fF$ liner of the Salah geometry, 57 per cent of the liner value (computed). Salah et al. report that the depletion resistance and capacitance change by more than 100 per cent between 0 and 1 $V$ , and Tan et al. measured the accumulation-to-depletion transition directly at 100 $kHz$ . Biasing TSVs into depletion is a way to lower signal capacitance. Reference: K. Salah, A. El Rouby, H. Ragai, K. Amin and Y. Ismail, ‘Compact Lumped Element Model for TSV in 3D-ICs’, IEEE (2011), pp. 2321-2324 (venue not named in the text; equations reconstructed from a garbled PDF) (fetch-tool summary); C. S. Tan, L. Zhang, H. Y. Li and W. Yoo, ‘Application of Low-k Liner for Stress and Capacitance Control in Cu-TSV’, IMAPS 2013, 46th International Symposium on Microelectronics, Orlando (fetch-tool summary); MOS Capacitor page of this vault.

Ques: How much does a low-k liner lower TSV capacitance, and what does it cost?

Tan et al. replaced a 3.9-permittivity PETEOS liner with a PECVD SiOC low-k film of about 205 $nm$ and permittivity of about 2.8 to 2.88 on TSVs of about 4.8 $μ m$ diameter and 10.6 $μ m$ depth, and the accumulation capacitance fell by about 26 per cent, which the permittivity ratio predicts exactly (computed). The sidewall capacitance falls from about 28 to 21 $fF$ for that geometry (computed). The low-k film is also more compliant, 7.2 $GPa$ against 75 $GPa$ , which cut the compressive stress near the silicon surface by more than 25 per cent. The cost is leakage: the fresh film leaked $1.6 \times 1 0^{- 5}$ $A/c m^{2}$ at 2 $MV/cm$ , much more than PETEOS, and needed a forming-gas anneal at 350 to 400 $^{\circ} C$ to approach PETEOS levels. Its larger thermal-expansion mismatch also raised the residual stress outside the TSV rows. Reference: C. S. Tan, L. Zhang, H. Y. Li and W. Yoo, ‘Application of Low-k Liner for Stress and Capacitance Control in Cu-TSV’, IMAPS 2013, 46th International Symposium on Microelectronics, Orlando (fetch-tool summary).

Ques: How do body contacts change the coupling of a TSV to the substrate?

Salah et al. model the silicon between the TSV and its body contacts as $C_{s i}$ and $R_{s i}$ proportional and inversely proportional to $0.5 π (8 n_{b c} + 1)$ , where $n_{b c}$ is the number of contacts at distance $Δ_{b c}$ . For their 5 $μ m$ TSV in 10 $S/m$ silicon with contacts 5 $μ m$ away, $C_{s i}$ rises from 7 to 68 and 250 $fF$ and $R_{s i}$ falls from 1.4 $kΩ$ to 155 and 42 $Ω$ for 0, 1 and 4 contacts, values their formulas reproduce (computed). The product $R_{s i} C_{s i}$ stays at $ε_{s i} / σ_{s i}$ , 10.6 $ps$ , so the substrate acts as a dielectric above about 15 $GHz$ and as a resistor below it (computed). Nearby contacts therefore lower the substrate impedance and raise the coupling to ground, which is why Salah et al. find TSV capacitance highly dependent on ground-contact positions. Reference: K. Salah, A. El Rouby, H. Ragai, K. Amin and Y. Ismail, ‘Compact Lumped Element Model for TSV in 3D-ICs’, IEEE (2011), pp. 2321-2324 (venue not named in the text; equations reconstructed from a garbled PDF) (fetch-tool summary).

Ques: How accurate are compact TSV models?

Within a few per cent of field simulation in the ranges tested. Salah et al. fitted their lumped model to quasi-static Q3D results, which agreed with full-wave HFSS within 5 per cent, and report $S_{21}$ errors below 1 per cent typically and 5 per cent at most from 0 to 10 $GHz$ . Luo et al. verified a ground-signal-ground model from 1 to 50 $GHz$ : the equivalent circuit matched EM simulation within 0.03 $dB$ in $S_{21}$ and 2 $dB$ in $S_{11}$ , and analytical equations gave standard errors of 0.18 and 2.32 per cent. Their extracted values differ more than these errors suggest, for example 269.79 against 231.92 $mΩ$ for one resistance and 4.24 against 2.10 $pH$ for one inductance, because the response is insensitive to small elements (my reading). Reference: K. Salah, A. El Rouby, H. Ragai, K. Amin and Y. Ismail, ‘Compact Lumped Element Model for TSV in 3D-ICs’, IEEE (2011), pp. 2321-2324 (venue not named in the text; equations reconstructed from a garbled PDF) (fetch-tool summary); C.-W. Luo, Y.-C. Wu, J.-Y. Wang and S. S. H. Hsu, ‘RF Modeling of Through Silicon Vias (TSVs) in 3D IC’, Extended Abstracts of SSDM 2010, Tokyo, 239-240 (fetch-tool summary).

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Through-Silicon Vias as Passives