Insulated Gate Bipolar Transistor (IGBT)

1. Theory

Definition: An insulated gate bipolar transistor (IGBT) is a power switch that combines a MOS gate input with a wide-base PNP bipolar output, giving MOSFET-like gate drive with bipolar current handling.
Placement: It sits with the FET pages because its collector current is controlled by an insulated MOS gate; terminals are gate (G), collector (C) and emitter (E).
Structure: Like a vertical power MOSFET, but with the $N^{+}$ drain replaced by a $P^{+}$ collector that injects holes into the $N^{-}$ drift region.
Equivalent circuit: The MOS channel current is the base current of the PNP, so $I_{C} = I_{M O S} / (1 - α_{p n p})$ ; the two parts share one drift region, so it is not a simple Darlington.
Conductivity modulation: Injected electron-hole plasma, far denser than the drift doping, greatly lowers drift-region resistance at high blocking voltages.
Parasitic thyristor: The $N^{+}$ emitter, P-base, $N^{-}$ drift and $P^{+}$ collector form a PNPN structure that must be kept from latching.
Drift designs: Non-punch-through (thick drift, triangular field), punch-through and field-stop ( $N^{+}$ buffer, trapezoidal field, thinner drift).

2. Working Principle

Turn-on: A gate voltage above $V_{T H}$ inverts the P-base, and channel electrons flow into the drift region, triggering hole injection from the collector.
On-state: The drop is a junction knee ( $\approx 0.7$ V) plus the small modulated drift-region drop, much lower than a power MOSFET at the same voltage rating.
Saturation (active) region: The saturated channel limits the collector current, which also sets the short-circuit current.
Turn-off and tail current: When the channel stops, stored charge in the drift region decays by recombination, giving a tail current that dominates turn-off loss.
Tail reduction: Lifetime control, field-stop thin wafers or transparent collectors shorten the tail at the cost of a higher on-state drop.
Latch-up prevention: A deep $P^{+}$ region under the $N^{+}$ emitter lowers the base spreading resistance so the parasitic thyristor cannot latch.
No body diode: The $P^{+}$ collector blocks reverse conduction, so an antiparallel diode is co-packaged or integrated (reverse-conducting IGBT).

3. Applications

Motor drives: Industrial variable-frequency drives and EV traction inverters in the 600–1700 V range.
Renewable-energy inverters: Solar central inverters and wind-turbine converters.
Traction and medium-voltage converters: Rail traction and high-voltage press-pack modules up to 6.5 kV.
Induction heating and welding: Medium-frequency, high-current resonant converters.
Uninterruptible power supplies: High-power UPS inverters.

Name	Formula	Related Formulae	Variables/Constants
Equivalent circuit: current split	$I_{C} = I_{M O S} + I_{P N P}$	$I_{P N P} = α_{p n p} I_{C}$ $I_{M O S} = (1 - α_{p n p}) I_{C}$ $I_{C} = \frac{I _{M O S}}{1 - α _{p n p}}$	$I_{C} : co l l ec t or c u r r e n t, e q u a l t o t h e e mi tt er c u r r e n t$ $I_{M O S} : e l ec t r o n c u r r e n t t h r o ug h t h e M O S c hann e l, w hi c h a l so d r i v es t h e ba se o f t h e P N P$ $I_{P N P} : h o l e c u r r e n t inj ec t e d b y t h e p + co l l ec t or an d co l l ec t e d b y t h e p - ba se$ $α_{p n p} : co mm o n - ba se c u r r e n t g ain o f t h e w i d e - ba se P N P t r an s i s t or, w i t h 0 < α_{p n p} < 1$
PNP current gain	$α_{p n p} = γ_{E} α_{T}$	$α_{T} = \frac{1}{c o s h ( W _{N} / L _{a} )}$ $L_{a} = D_{a} τ_{H L}$ $D_{a} = \frac{2 D _{n} D _{p}}{D _{n} + D _{p}}$	$γ_{E} : e mi tt er inj ec t i o n e f f i c i e n cy o f t h e p + co l l ec t or j u n c t i o n (h o l e c u r r e n t d i v i d e d b y t o t a l c u r r e n t); c l ose t o 1 f or a h e a v i l y d o p e d co l l ec t or, l o w er f or a t r an s p a r e n t co l l ec t or$ $α_{T} : ba se t r an s p or t f a c t or o f t h e n - d r i f t r e g i o n$ $W_{N} : u n d e pl e t e d t hi c k n ess o f t h e n - d r i f t (ba se) r e g i o n$ $L_{a} : ambi p o l a r d i f f u s i o n l e n g t h u n d er hi g h - l e v e l inj ec t i o n$ $D_{a} : ambi p o l a r d i f f u s i o n coe f f i c i e n t$ $D_{n}, D_{p} : e l ec t r o n an d h o l e d i f f u s i o n coe f f i c i e n t s$ $τ_{H L} : hi g h - l e v e l c a r r i er l i f e t im e in t h e d r i f t r e g i o n$
Threshold voltage	$V_{T H} = V_{F B} + 2 ϕ_{F} + \frac{4 ε _{s} q N _{A} ϕ _{F}}{C _{o x}}$	$ϕ_{F} = \frac{k _{B} T}{q} ln \frac{N _{A}}{n _{i}}$	$V_{T H} : g a t e - e mi tt er v o l t a g e a t w hi c h t h e p - ba se in v er t s u n d er t h e g a t e$ $V_{F B} : f l a t - ban d v o l t a g e$ $ϕ_{F} : F er mi p o t e n t ia l o f t h e p - ba se$ $N_{A} : p e ak d o p in g o f t h e p - ba se a l o n g t h e c hann e l s u r f a ce (t h e D M O S ba se p r o f i l e i s l a t er a l l y n o n - u ni f or m an d i t s p e ak se t s V_{T H})$ $C_{o x} : g a t e o x i d e c a p a c i t an ce p er u ni t a r e a$ $ε_{s} : se mi co n d u c t or p er mi tt i v i t y$ $n_{i} : in t r in s i c c a r r i er co n ce n t r a t i o n$ $k_{B} : B o l t z mann co n s t an t$ $(s am e e x p r ess i o n a s t h e L o n g C hann e l M O S F E T p a g e)$
Channel current (MOS part)	$I_{M O S, s a t} = \frac{μ _{ni} C _{o x} Z}{2 L _{c h}} (V_{GE} - V_{T H})^{2}$	$I_{M O S, l in} = \frac{μ _{ni} C _{o x} Z}{L _{c h}} [(V_{GE} - V_{T H}) V_{c h} - \frac{V _{c h}^{2}}{2}]$	$I_{M O S, s a t} : s a t u r a t e d c hann e l e l ec t r o n c u r r e n t$ $μ_{ni} : e l ec t r o n in v er s i o n l a y er m o bi l i t y$ $Z : t o t a l c hann e l w i d t h o f t h e d e v i ce$ $L_{c h} : c hann e l l e n g t h se t b y t h e d i f f er e n ce b e tw ee n t h e p - ba se an d n + e mi tt er d i f f u s i o n s$ $V_{GE} : g a t e - e mi tt er v o l t a g e$ $V_{c h} : v o l t a g e d r o p a l o n g t h e c hann e l in t h e l in e a r r e g i o n$
Collector current in the active region and transconductance	$I_{C, s a t} = \frac{μ _{ni} C _{o x} Z}{2 L _{c h} ( 1 - α _{p n p} )} (V_{GE} - V_{T H})^{2}$	$g_{m} = \frac{\partial I _{C}}{\partial V _{GE}} = \frac{1}{1 - α _{p n p}} \frac{μ _{ni} C _{o x} Z}{L _{c h}} (V_{GE} - V_{T H})$	$I_{C, s a t} : co l l ec t or c u r r e n t l imi t e d b y t h e s a t u r a t e d c hann e l (t hi s a l so se t s t h e s h or t - c i r c u i t c u r r e n t)$ $g_{m} : t r an sco n d u c t an ce, l a r g er t han t ha t o f t h e M O S p a r t b y t h e f a c t or 1/ (1 - α_{p n p})$
On-state voltage drop	$V_{C E, o n} = V_{J 1} + V_{d r i f t} + (1 - α_{p n p}) I_{C} (R_{C H} + R_{A} + R_{J F E T})$	$V_{J 1} \approx \frac{k _{B} T}{q} ln \frac{N _{A, c} p _{N} ( 0 )}{n _{i}^{2}}$ $V_{C E, o n} \approx V_{C E 0} + r_{C E} I_{C}$	$V_{C E, o n} : co l l ec t or - e mi tt er v o l t a g e in t h e o n s t a t e$ $V_{J 1} : f or w a r d d r o p o f t h e p + co l l ec t or t o n - j u n c t i o n, w hi c h i s w h y t h e I GB T ha s a k n ee v o l t a g e o f ab o u t 0.7 V or m or e$ $V_{d r i f t} : v o l t a g e a cr oss t h e co n d u c t i v i t y - m o d u l a t e d d r i f t r e g i o n$ $R_{C H}, R_{A}, R_{J F E T} : c hann e l, a cc u m u l a t i o n l a y er an d J F E T r e g i o n r es i s t an ces see n b y t h e e l ec t r o n c u r r e n t$ $N_{A, c} : d o p in g o f t h e p + co l l ec t or$ $p_{N} (0) : h o l e co n ce n t r a t i o n a t t h e e d g e o f t h e n - d r i f t n e x t t o t h e co l l ec t or j u n c t i o n, e q u a l t o t h e e l ec t r o n co n ce n t r a t i o n u n d er hi g h - l e v e l inj ec t i o n$ $(V_{J 1} i s B a l i g a^{'} s e l ec t r os t a t i c j u n c t i o n d r o p, w hi c h p ai r s w i t h an o hmi c V_{d r i f t}; t h e q u a s i - F er mi l e v e l se p a r a t i o n (2 k_{B} T / q) ln (p_{N} (0) / n_{i}) i s s ma l l er b y (k_{B} T / q) ln (N_{A, c} / p_{N} (0)))$ $V_{C E 0}, r_{C E} : k n ee v o l t a g e an d d i f f er e n t ia l o n - r es i s t an ce o f t h e l in e a r i z e d o u tp u t c u r v e$ $k_{B} : B o l t z mann co n s t an t$
Conductivity-modulated drift region	$V_{d r i f t} = I_{C} R_{d r i f t} = \frac{I _{C} W _{N}}{q ( μ _{n} + μ _{p} ) p ˉ A}$	$σ = q (μ_{n} + μ_{p}) \overset{p}{ˉ}$ $Q_{N} = q \overset{p}{ˉ} W_{N} A \approx (γ_{E} - α_{p n p}) I_{C} τ_{H L} \approx I_{M O S} τ_{H L}$ $V_{d r i f t} \approx \frac{W _{N}^{2}}{( μ _{n} + μ _{p} ) ( 1 - α _{p n p} ) τ _{H L}}$	$R_{d r i f t} : r es i s t an ce o f t h e d r i f t r e g i o n a f t er co n d u c t i v i t y m o d u l a t i o n$ $\overset{p}{ˉ} : a v er a g e inj ec t e d h o l e (an d e l ec t r o n) co n ce n t r a t i o n in t h e d r i f t r e g i o n, f a r ab o v e t h e d o p in g N_{D}$ $μ_{n}, μ_{p} : e l ec t r o n an d h o l e m o bi l i t i es a t t h e hi g h inj ec t e d d e n s i t y$ $A : a c t i v e a r e a$ $Q_{N} : s t or e d c ha r g e in t h e d r i f t r e g i o n (c ha r g e - co n t r o l es t ima t e, v a l i d w h e n r eco mbina t i o n d o mina t es t h e l oss o f s t or e d c ha r g e)$ $(γ_{E} - α_{p n p}) I_{C} : inj ec t e d h o l e c u r r e n t t ha t r eco mbin es in t h e d r i f t r e g i o n r a t h er t han r e a c hin g t h e p - ba se; f or γ_{E} \approx 1 i t e q u a l s t h e c hann e l e l ec t r o n c u r r e n t I_{M O S}$ $(s in ce \overset{p}{ˉ} g r o w s in p r o p or t i o n t o I_{C}, V_{d r i f t} i s n e a r l y in d e p e n d e n t o f c u r r e n t; B a l i g a^{'} s P i N d i o d e m o d e l g i v es t h e e x a c t d e p e n d e n ce o n W_{N} / L_{a})$
Forward blocking voltage (non-punch-through)	$B V = \frac{ε _{s} E _{c}^{2}}{2 q N _{D}}$	$W_{d e p} = \frac{2 ε _{s} B V}{q N _{D}} = \frac{2 B V}{E _{c}}$ $W_{N} \geq W_{d e p}$	$B V : f or w a r d b l oc k in g v o l t a g e o f t h e p - ba se t o n - d r i f t j u n c t i o n$ $E_{c} : cr i t i c a l e l ec t r i c f i e l d f or a v a l an c h e b r e ak d o w n$ $N_{D} : d o p in g o f t h e n - d r i f t r e g i o n$ $W_{d e p} : d e pl e t i o n w i d t h a t b r e ak d o w n$ $W_{N} : d r i f t r e g i o n t hi c k n ess, c h ose n t o b e a t l e a s t W_{d e p} so t h e f i e l d n e v er r e a c h es t h e co l l ec t or$
Forward blocking voltage (punch-through or field-stop)	$B V = E_{c} W_{N} - \frac{q N _{D} W _{N}^{2}}{2 ε _{s}}$	$E_{1} = E_{c} - \frac{q N _{D} W _{N}}{ε _{s}}$	$W_{N} : t hi c k n ess o f t h e n - d r i f t r e g i o n b e tw ee n t h e p - ba se an d t h e n + b u f f er$ $E_{1} : e l ec t r i c f i e l d a t t h e n - d r i f t t o n + b u f f er in t er f a ce, n o n z er o b ec a u se t h e b u f f er s t o p s t h e d e pl e t i o n r e g i o n$ $(t r a p ez o i d a l f i e l d p r o f i l e; t h e t hinn er d r i f t r e g i o n l o w er s V_{d r i f t})$
Open-base breakdown and the PNP gain	$B V_{C E O} = B V_{C B O} (1 - α_{p n p})^{1/ n}$	$M = \frac{1}{1 - ( V / B V _{C B O} ) ^{n}}$ $α_{p n p} M = 1$	$B V_{C E O} : b r e ak d o w n v o l t a g e w i t h t h e c hann e l o f f (g a t e s h or t e d t o t h e e mi tt er)$ $B V_{C B O} : a v a l an c h e b r e ak d o w n o f t h e co l l ec t or - ba se j u n c t i o n a l o n e$ $M : a v a l an c h e m u l t i pl i c a t i o n f a c t or (M i l l er e m p i r i c a l f or m)$ $n : e m p i r i c a l m u l t i pl i c a t i o n e x p o n e n t f or t h e p + t o n - j u n c t i o n, 4 t o 6 in t h e l i t er a t u r e (B a l i g a u ses 6)$ $(a l o w α_{p n p} k ee p s B V_{C E O} c l ose t o B V_{C B O})$
Latch-up of the parasitic thyristor	$α_{n p n} + α_{p n p} \geq 1$	$I_{C, L} = \frac{V _{J, n +}}{α _{p n p} R _{B}}$ $J_{C, L} = \frac{V _{J, n +}}{α _{p n p} R _{B, s p}}$	$α_{n p n} : g ain o f t h e p a r a s i t i c n + e mi tt er, p - ba se, n - d r i f t N P N t r an s i s t or$ $I_{C, L} : co l l ec t or c u r r e n t a t w hi c h t h e h o l e c u r r e n t u n d er t h e n + e mi tt er f or w a r d bia ses i t$ $V_{J, n +} : t u r n - o n v o l t a g e o f t h e n + e mi tt er t o p - ba se j u n c t i o n, ab o u t 0.7 V$ $R_{B} : l a t er a l s p r e a d in g r es i s t an ce o f t h e p - ba se u n d er t h e n + e mi tt er$ $R_{B, s p} : t h e s am e r es i s t an ce r e f er r e d t o u ni t ce l l a r e a$ $J_{C, L} : l a t c h - u p co l l ec t or c u r r e n t d e n s i t y$ $(t h e tw o cr i t er ia a c t in se q u e n ce : t h e R_{B} d r o p t u r n s o n t h e n + e mi tt er an d r ai ses α_{n p n}, an d t h e d e v i ce l a t c h es o n ce t h e g ain co n d i t i o n i s m e t; t h e c hann e l e l ec t r o n c u r r e n t d oes n o t f l o w t h r o ug h R_{B})$
Device capacitances	$C_{i es} = C_{GE} + C_{GC}$ $C_{oes} = C_{C E} + C_{GC}$ $C_{r es} = C_{GC}$	$Q_{G} = Q_{GE} + Q_{GC} + Q_{o v}$	$C_{i es} : in p u t c a p a c i t an ce$ $C_{oes} : o u tp u t c a p a c i t an ce$ $C_{r es} : r e v er se t r an s f er (M i l l er) c a p a c i t an ce$ $C_{GE}, C_{GC}, C_{C E} : g a t e - e mi tt er, g a t e - co l l ec t or an d co l l ec t or - e mi tt er c a p a c i t an ces$ $Q_{G} : t o t a l g a t e c ha r g e t o b r in g V_{GE} t o t h e d r i v e l e v e l, w i t h Q_{GE} t o r e a c h t h e pl a t e a u, Q_{GC} a cr oss t h e M i l l er pl a t e a u an d Q_{o v} in o v er d r i v e$
Turn-on delay and Miller plateau	$t_{d, o n} = R_{G} C_{i es} ln \frac{V _{GG +} - V _{GG -}}{V _{GG +} - V _{T H}}$	$V_{GP} = V_{T H} + \frac{2 L _{c h} ( 1 - α _{p n p} ) I _{C}}{μ _{ni} C _{o x} Z}$ $t_{pl} = \frac{R _{G} C _{GC} Δ V _{C E}}{V _{GG +} - V _{GP}}$	$t_{d, o n} : d e l a y f r o m t h e s t a r t o f t h e g a t e p u l se u n t i l t h e co l l ec t or c u r r e n t b e g in s t o r i se (C_{i es} t ak e n a s co n s t an t; in r e a l i t y i t v a r i es w i t h V_{C E})$ $R_{G} : t o t a l g a t e r es i s t an ce (e x t er na l pl u s in t er na l)$ $V_{GG +}, V_{GG -} : o n - s t a t e an d o f f - s t a t e g a t e d r i v er v o l t a g es$ $V_{GP} : g a t e v o l t a g e o n t h e M i l l er pl a t e a u, w hi c h h o l d s t h e c hann e l a t t h e l o a d c u r r e n t I_{C}$ $t_{pl} : d u r a t i o n o f t h e pl a t e a u w hi l e V_{C E} f a l l s b y Δ V_{C E} (t r e a t in g C_{GC} a s co n s t an t)$
Turn-off tail current and energy	$i_{C} (t) = I_{t ai l, 0} e^{- t / τ_{H L}}$	$I_{t ai l, 0} \approx α_{p n p} I_{C}$ $E_{t ai l} \approx V_{b u s} I_{t ai l, 0} τ_{H L}$	$i_{C} (t) : co l l ec t or c u r r e n t a f t er t h e c hann e l c u r r e n t ha s s t o pp e d, w i t h t h e P N P ba se o p e n$ $I_{t ai l, 0} : t ai l c u r r e n t a t t h e s t a r t, a pp r o x ima t e l y t h e P N P s ha r e o f t h e p r e - t u r n - o f f c u r r e n t$ $τ_{H L} : hi g h - l e v e l l i f e t im e t ha t r e m o v es t h e s t or e d c ha r g e b y r eco mbina t i o n o n l y$ $E_{t ai l} : e n er g y d i ss i p a t e d in t h e t ai l a t t h e b u s v o l t a g e V_{b u s}$ $(a pp r o x ima t e s in g l e - e x p o n e n t ia l m o d e l; r e a l t ai l s a r e s ha p e d b y t h e r i s in g V_{C E})$
Power loss and junction temperature	$P_{t o t} = P_{co n d} + P_{s w}$	$P_{co n d} = D V_{C E, o n} I_{C}$ $P_{s w} = (E_{o n} + E_{o f f}) f_{s w}$ $T_{j} = T_{c} + P_{t o t} R_{t h, j c}$	$P_{t o t} : a v er a g e p o w er d i ss i p a t i o n$ $D : d u t y cy c l e o f t h e o n - s t a t e$ $E_{o n}, E_{o f f} : e n er g y l os t p er t u r n - o n an d p er t u r n - o f f e v e n t$ $f_{s w} : s w i t c hin g f r e q u e n cy$ $T_{j}, T_{c} : j u n c t i o n an d c a se t e m p er a t u r es$ $R_{t h, j c} : j u n c t i o n - t o - c a se t h er ma l r es i s t an ce$

Important Questions

Ques: Why is the IGBT listed under the FET pages when its current is carried by both electrons and holes?

The IGBT is a voltage-controlled device: the gate is insulated by an oxide, draws no steady current, and the collector current is set by the MOS channel through $I_{C} = I_{M O S} / (1 - α_{p n p})$ . The channel is only the input stage, however. The output stage is a wide-base PNP bipolar transistor whose base current is the channel current, so conduction in the drift region is bipolar. It therefore combines the gate drive of a power MOSFET with the current handling of a bipolar transistor. It is also not a simple Darlington connection, because the MOSFET and the PNP share the same drift region. Reference: B.J. Baliga, Fundamentals of Power Semiconductor Devices, Springer, 2008.

Ques: Why does the IGBT have a lower on-state voltage than a power MOSFET of the same blocking voltage?

In a power MOSFET the drift region has only the donor-doped carriers, and its specific resistance grows as about $B V^{2.5}$ for silicon (see the Power MOSFET page), so it dominates above a few hundred volts. In the IGBT the p+ collector injects holes, and the injected electron-hole density $\overset{p}{ˉ}$ far exceeds $N_{D}$ . The drift region resistance then follows $V_{d r i f t} = I_{C} W_{N} / [q (μ_{n} + μ_{p}) \overset{p}{ˉ} A]$ and is smaller by the ratio of the injected to the doped density. The cost is the extra junction drop $V_{J 1}$ , which sets a knee voltage of about 0.7 V, and the stored charge that must be removed at turn-off. Reference: B.J. Baliga, The IGBT Device, Elsevier, 2015.

Ques: What causes the tail current at turn-off, and how can it be reduced?

When the channel turns off, the electron supply to the PNP base stops, but the drift region still holds stored charge $Q_{N}$ . With the base open, this charge cannot be swept out through a base contact, and only recombination (time constant $τ_{H L}$ ) or the collection of holes at the p-base removes it. The slowly decaying hole current is the tail, and it overlaps with a high collector voltage, so it dominates the turn-off loss $E_{o f f}$ . The tail can be shortened by lifetime control (electron irradiation or heavy-metal doping), which raises $V_{C E, o n}$ , by a thinner drift region (punch-through or field-stop design), or by a lower collector injection efficiency (a lightly doped or transparent collector). Reference: B.J. Baliga, The IGBT Device, Elsevier, 2015; J. Lutz, H. Schlangenotto, U. Scheuermann and R. De Doncker, Semiconductor Power Devices, Springer, 2011.

Ques: What is latch-up in an IGBT and how is it prevented?

The structure contains a parasitic thyristor formed by the n+ emitter, p-base, n- drift and p+ collector. Hole current from the PNP flows laterally through the p-base under the n+ emitter, and when its voltage drop $I_{P N P} R_{B}$ reaches about 0.7 V the n+ emitter injects electrons and $α_{n p n} + α_{p n p} \geq 1$ may be reached. Once latched, the gate can no longer turn the device off. Designs avoid it by adding a deep, heavily doped p+ region under the n+ emitter, which reduces $R_{B}$ , by shortening the n+ emitter, and by keeping $α_{p n p}$ low. Trench gates also help: the hole current flows up along the p-base beside the trench to the p+ contact, and the n+ emitter can be made short, so the lateral path under the n+ emitter, and with it $R_{B}$ , is smaller than in a planar cell. Reference: B.J. Baliga, Fundamentals of Power Semiconductor Devices, Springer, 2008.

Ques: What are the differences between non-punch-through, punch-through and field-stop IGBTs?

In the non-punch-through design a thick lightly doped drift region absorbs the whole field, so the field profile is triangular and $W_{N} \geq W_{d e p}$ with $B V = ε_{s} E_{c}^{2} / (2 q N_{D})$ . In the punch-through design an n+ buffer layer stops the depletion region and the field is trapezoidal, so the same $B V$ is reached with a thinner drift region, lowering $V_{d r i f t}$ . The field-stop design combines the two: it is a thin wafer with a trapezoidal field like the punch-through device, but its buffer is a lightly doped layer implanted from the back and its collector is a shallow, low-dose (transparent) implant like the non-punch-through device. The non-punch-through and field-stop designs, which rely on a transparent collector and a long lifetime, have a positive temperature coefficient of $V_{C E, o n}$ at rated current and are easy to parallel. The classic punch-through design, built on a heavily doped p+ substrate with lifetime killing, has a lower on-state drop at the same voltage rating but a negative temperature coefficient over much of its current range. Reference: S.M. Sze and Kwok K. Ng, Physics of Semiconductor Devices, 3rd ed., Wiley, 2007; B.J. Baliga, The IGBT Device, Elsevier, 2015.

Ques: Why does a standard IGBT have no body diode, and what is used for reverse conduction?

With the emitter positive, the p+ collector to n- drift junction $J_{1}$ is reverse biased, so no reverse current flows: unlike a MOSFET, the IGBT has no intrinsic body diode. How much reverse voltage $J_{1}$ can hold depends on the design. In a punch-through or field-stop device $J_{1}$ faces the n+ buffer, so it breaks down at a few tens of volts. In a non-punch-through device $J_{1}$ faces the lightly doped drift region and could in principle block, but the junction is cut through at the sawn die edge and is not terminated, so a standard device is not rated for reverse blocking. In inverter use, the load current needs a free-wheeling path, which is provided by an anti-parallel fast recovery diode that is co-packaged or integrated on the same chip (reverse-conducting IGBT). Where reverse blocking is needed, the device is built with an isolation junction around the die edge (reverse-blocking IGBT). Reference: J. Lutz, H. Schlangenotto, U. Scheuermann and R. De Doncker, Semiconductor Power Devices, Springer, 2011.

Ques: What does a trench gate change compared with a planar gate?

In a trench IGBT the channel is vertical along the wall of a trench, so there is no JFET region between neighboring p-bases and $R_{J F E T} = 0$ . The cell pitch can also be smaller, and with a carrier-stored layer or a narrow mesa the injection of electrons near the emitter is enhanced, which raises the carrier density near the emitter side and lowers $V_{d r i f t}$ . The drawbacks are a higher gate-emitter capacitance and a higher saturation current, which make the short-circuit capability harder to achieve. Reference: B.J. Baliga, The IGBT Device, Elsevier, 2015.

Ques: How does temperature affect the IGBT?

The threshold voltage falls with temperature, because $n_{i}$ rises steeply, which lowers the Fermi potential $ϕ_{F}$ and with it both the $2 ϕ_{F}$ term and the depletion-charge term of $V_{T H}$ . The carrier mobility falls, which increases the resistances $R_{C H}$ and $R_{d r i f t}$ , and the lifetime $τ_{H L}$ rises, which increases $α_{p n p}$ and the tail energy. At low currents $V_{C E, o n}$ falls with temperature, while at high currents it increases, so devices share current well in parallel only above that crossover. Latch-up current also falls at high temperature, because $R_{B}$ rises as the hole mobility falls, the n+ emitter turn-on voltage $V_{J, n +}$ drops, and $α_{p n p}$ rises. Reference: B.J. Baliga, Fundamentals of Power Semiconductor Devices, Springer, 2008.

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