This page covers the degradation that is specific to wide-bandgap power switches: the SiC MOSFET and its body diode, the SiC Schottky diode, and transistors made of beta-Ga2O3. The general avalanche, short-circuit and breakdown models are on the Electrical Stress page, and the power-cycling and cosmic-ray models of power modules on the Silicon Power MOSFET, IGBT and Thyristors page; this page covers what the SiC/SiO2 interface, the crystal defects of SiC and the poor heat conduction of Ga2O3 add.

1. Why It Happens

Trigger: The gate bias and its switching between a positive on-level and a negative off-level, a gate field held for years over an oxide with many extrinsic defects, bipolar current through the body diode during dead times, a short circuit at full bus voltage, and, in Ga2O3, the gate bias and the self-heating (Puschkarsky et al.; Infineon; Harada et al.; Fabris et al.).
Mechanism, threshold drift: Border traps near the SiC/SiO2 interface capture electrons under positive gate bias and holes or emit electrons under negative bias, so the threshold moves both ways, by up to several volts in the short term, and a part becomes permanent (Puschkarsky et al.).
Mechanism, gate oxide: The intrinsic strength of the oxide is that of SiO2 on Si, but the extrinsic defect density is 3 to 4 orders of magnitude higher, and the conduction-band offset of about 2.7 $eV$ against 3.2 $eV$ on Si lets tunnelling start at a lower field (Infineon; Li et al.).
Mechanism, bipolar degradation: Electron-hole recombination at a basal-plane dislocation drives a Shockley partial dislocation across the basal plane, and the growing stacking fault blocks current over its area (Harada et al.; Infineon).
Mechanism, Ga2O3: Electrons are trapped at border traps of the Al2O3/Ga2O3 interface with logarithmic kinetics (Fregolent et al.; Fabris et al.), and the thermal conductivity is 10.9 to 27 $W/ (m K)$ , which makes the channel run hot (Guo et al.).
What sets the rate: The negative off-state gate voltage and the switching frequency for the AC drift, and the temperature and the read-out delay for its measurement (Infineon; Puschkarsky et al.); the oxide thickness and the screening voltage for the oxide (Infineon); the carrier density in the drift layer and the buffer design for stacking faults (Harada et al.); the ratio of the blocking voltage to the breakdown voltage for cosmic rays (Infineon).
Failure criterion: A rise of $R_{O N}$ by 15 per cent over 10 years at 125 $^{\circ} C$ in one maker’s guideline (Infineon); a gate-oxide failure fraction in ppm over the mission (Infineon); a body-diode forward voltage or $R_{D S (o n)}$ outside the data sheet (Infineon); destruction in a short circuit beyond about 3 $μ s$ (Infineon).

2. Where to Look

Location: The oxide near the SiC/SiO2 interface and the trench corners of trench MOSFETs (Puschkarsky et al.); basal-plane dislocations in the epitaxial layer, which start the stacking faults (Harada et al.); the thin surface part of the drift zone in a short circuit (Infineon); the Al2O3/Ga2O3 interface (Fregolent et al.).
Signature: A threshold that differs by volts depending on how long after switching it is read (Puschkarsky et al.); triangular or band-shaped stacking faults in photoluminescence images, with a rising $V_{S D}$ and $R_{D S (o n)}$ and an unchanged breakdown voltage (Infineon; Harada et al.); a positive threshold shift that does not recover in the dark in Ga2O3 but recovers under UV light (Fabris et al.).
Confirm with: Threshold read-out within about 1 $μ s$ , since the JEDEC delay of up to 48 $h$ misses most of the shift (Puschkarsky et al.); gate-voltage step-stress and marathon tests on many devices (Infineon); UV photoluminescence imaging of stacking faults (Harada et al.); fast-capacitance and photon-energy-resolved detrapping for Ga2O3 (Fregolent et al.; Fabris et al.).
Look-alikes: The fast, recoverable hysteresis of the threshold looks like degradation if the measurement is slow, and the apparent activation energy even turns negative below 5 ms delay (Puschkarsky et al.). A body-diode $V_{S D}$ rise from stacking faults looks like a die-attach problem, but the thermal resistance stays the same (my reading).

3. Prevention

Design: Keep the off-state gate voltage near 0 $V$ or above about -2.5 $V$ , since only a more negative level enhances the AC drift (Infineon); allow for the threshold hysteresis in the gate drive and the current sharing (Puschkarsky et al.); detect short circuits within the 3 $μ s$ rating (Infineon); avoid long body-diode conduction or use devices qualified for it; in Ga2O3 remove heat through the top side or a high-conductivity substrate, and orient the channel along [010] where possible (Guo et al., my reading).
Material and process: A thicker gate oxide for higher screening voltages (Infineon); a thick buffer layer that converts basal-plane dislocations, or proton irradiation of $1 \times 1 0^{11}$ to $1 \times 1 0^{13}$ $c m^{- 2}$ (Harada et al.); process changes that cut NBTI by an order of magnitude (Infineon).
Operation: Keep the gate drive within the data-sheet levels and the junction cool, since the drift grows with temperature; allow fewer power cycles than for Si, a factor of 0.33 in one model (Semikron AN 21-001).
Screening and test: A high gate-voltage pulse on every device to remove extrinsic oxide defects (Infineon); BTI tests with microsecond read-out (Puschkarsky et al.); 100 per cent short-circuit testing (Infineon); HV-H3TRB at 80 per cent of $V_{D S S}$ (Infineon).

Threshold Drift at the SiC/SiO2 Interface

Name	Formula	Related Formulae	Variables/Constants
Capture and emission times of SiC/SiO2 border traps	$E_{a} = k_{B} T ln \frac{τ}{τ _{0}}$	$τ_{2} = τ_{0} (\frac{τ _{1}}{τ _{0}})^{T_{1} / T_{2}}$	$E_{a} : a c t i v a t i o n e n er g y o f a c a pt u r e or e mi ss i o n p r ocess$ $k_{B} : B o l t z mann co n s t an t 8.617 \times 1 0^{- 5} eV/K$ $T : ab so l u t e t e m p er a t u r e$ $τ : t im e co n s t an t$ $τ_{0} : a tt e m pt t im e, 1 \times 1 0^{- 15} s in t h e f i t o f P u sc hk a r s k y e t a l .$ $τ_{1}, τ_{2} : t h e s am e t im e co n s t an t a t T_{1} an d T_{2}; P u sc hk a r s k y e t a l . (1200 V t r e n c h M O S F E T s, + 20/ - 10 V r a t in g, 25 t o 175^{\circ} C) : V_{t h} m o v es b e tw ee n ab o u t + 1 an d - 3 V, m os t o f a p os i t i v e s hi f t r eco v er s w i t hin a f e w m s an d ha l f w i t hin 100 m s, r eco v er y i s l in e a r o n a l o g - l o g sc a l e (S i : ab o u t l in e a r in l o g t), e mi ss i o n t im es a t 0 V r e a c h 10 s, t h e a pp a r e n t a c t i v a t i o n e n er g y d e p e n d s o n t h e r e a d - o u t d e l a y an d i s n e g a t i v e b e l o w 5 m s, an d t h e d e f ec t e n se mb l e i s m o d e l l e d a s tw o bi v a r ia t e G a u ss ian d i s t r ib u t i o n s o f c a pt u r e an d e mi ss i o n e n er g i es$ $(co m p u t e d w i t h τ_{0} = 1 \times 1 0^{- 15} s : a t im e o f 1 m s a t 25^{\circ} C m e an s E_{a} = 0.71 eV an d b eco m es 9.6 \times 1 0^{- 8} s a t 175^{\circ} C; 1 s m e an s 0.89 eV an d 9.5 \times 1 0^{- 6} s; 10 s m e an s 0.95 eV an d 4.4 \times 1 0^{- 5} s, so a h o t d e v i ce e m pt i es i t s t r a p s 4 t o 5 or d er s o f ma g ni t u d e f a s t er)$
Gate switching drift and the on-resistance	$Δ V_{T H, A C} \propto (t_{s} f)^{n}$	$R_{O N} = R_{c h} + R_{J F E T} + R_{e p i} + R_{s u b}, R_{c h} \propto \frac{L}{W μ _{n} C _{o x} ( V _{G H} - V _{T H} )}$ $\frac{Δ R _{c h}}{R _{c h}} = \frac{Δ V _{T H}}{V _{G H} - V _{T H} - Δ V _{T H}}$	$Δ V_{T H, A C} : t h r es h o l d d r i f t u n d er g a t e s w i t c hin g$ $t_{s} : s t r ess t im e$ $f : s w i t c hin g f r e q u e n cy$ $n : e x p o n e n t$ $R_{O N} : o n - r es i s t an ce an d i t s c hann e l, J F E T, e p i t a x ia l - l a y er an d s u b s t r a t e p a r t s$ $L, W : c hann e l l e n g t h an d w i d t h$ $μ_{n} : c hann e l m o bi l i t y$ $C_{o x} : o x i d e c a p a c i t an ce p er a r e a$ $V_{G H} : o n - s t a t e g a t e v o l t a g e$ $V_{T H} : t h r es h o l d (t h e l a s t f or m f o l l o w s f r o m R_{c h} w i t h V_{T H} r ai se d b y Δ V_{T H}, d er i v e d); I n f in eo n : t h e A C d r i f t i s a l w a y s p os i t i v e, f o l l o w s t h e n u mb er o f s w i t c hin g e v e n t s, i s e nhan ce d o n l y w h e n t h e o f f - s t a t e g a t e v o l t a g e i s b e l o w ab o u t - 2.5 V (a t 0 V i t e q u a l s D C B T I), see m s t o s a t u r a t e a f t er ab o u t a y e a r, an d t h e g u i d e l in e l imi t s t h e R_{O N} r i se t o 15 p er ce n t o v er 10 y e a r s a t 125^{\circ} C; D C N B T I w a s c u t b y an or d er o f ma g ni t u d e an d P B T I a t 200^{\circ} C an d + 25 V s t a y s n e a r 100 mV, ab o u t 8 t im es t h e S i r e f er e n ce; P u sc hk a r s k y e t a l . : u n d er 50 k H z bi p o l a r s w i t c hin g a t 175^{\circ} C t h e s h or t - t er m h y s t er es i s i s u p t o 4 V f or - 10/ + 20 V an d 120 mV f or 5/25 V, t h e minim u m V_{t h} d e p e n d s e x p o n e n t ia l l y o n t h e l o w g a t e l e v e l, an d R_{O N} f o l l o w s V_{t h}$ $(co m p u t e d : a d r i f t o f 0.3 V r ai ses R_{c h} b y 2.2 p er ce n t a t V_{G H} = 18 V an d V_{T H} = 4 V an d b y 2.8 p er ce n t a t 15 V, an d 1 V b y 7.7 p er ce n t a t 18 V; w i t h n = 0.2 or 0.3 (a ss u m e d) t e n t im es t h e f r e q u e n cy g i v es 1.6 or 2.0 t im es t h e d r i f t a f t er t h e s am e t im e)$

Gate Oxide of SiC MOSFETs

Name	Formula	Related Formulae	Variables/Constants
Tunnelling barrier of the SiC/SiO2 interface	$J_{F N} = A_{F N} E_{o x}^{2} e^{- B_{F N} / E_{o x}}, B_{F N} = \frac{8 π 2 m _{o x} ϕ _{B}^{3/2}}{3 h q}$	$\frac{B _{F N} ( 4 H )}{B _{F N} ( S i )} = (\frac{ϕ _{B, 4 H}}{ϕ _{B, S i}})^{3/2}$	$J_{F N} : F o w l er - N or d h e im c u r r e n t d e n s i t y$ $A_{F N} : p r e f a c t or$ $E_{o x} : o x i d e f i e l d$ $B_{F N} : e x p o n e n t ia l co n s t an t$ $m_{o x} : t u nn e l l in g ma ss, 0.42 m_{0} in L i e t a l .$ $ϕ_{B} : co n d u c t i o n - ban d o f f se t (ba r r i er)$ $h : P l an c k co n s t an t$ $q : e l e m e n t a r y c ha r g e (t h e B_{F N} e x p r ess i o n i s t h e o n e o f t h e F l o a t in g G a t e F l a s h M e m or y p a g e o f t hi s v a u l t, w r i tt e n w i t h h = 2 π ℏ); L i e t a l . : o f f se t s o f ab o u t 2.7 eV f or 4 H - S i C, 3.2 eV f or S i an d 3.7 eV f or 3 C - S i C, m e a s u r e d 3.65 t o 3.71 eV o n 3 C, an d F o w l er - N or d h e im co n d u c t i o n d o mina t es ab o v e ab o u t 5 t o 5.5 MV/cm f or 4 H - S i C a g ain s t ab o u t 7 MV/cm f or 3 C - S i C$ $(co m p u t e d : (2.7/3.2)^{3/2} = 0.78, so t h e s am e t u nn e l l in g c u r r e n t f l o w s in 4 H - S i C a t 0.78 o f t h e f i e l d n ee d e d in S i; f or 3 C t h e r a t i o t o 4 H i s 1.60)$
Extrinsic gate-oxide failures and screening	$- ln (1 - F) = a e^{b (V_{G} - V_{U S E})}$	$lo g_{10} \frac{t ( E _{1} )}{t ( E _{2} )} = γ_{d ec} (E_{2} - E_{1})$ $F (t) = 1 - e^{- (t / t_{63})^{β}}$	$F : c u m u l a t i v e f r a c t i o n f ai l e d$ $a, b : f i t co n s t an t s (a t im es 1 \times 1 0^{6} g i v es pp m)$ $V_{G} : s t r ess g a t e v o l t a g e$ $V_{U S E} : u se v o l t a g e, 20 V in L i e t a l .$ $t : t im e t o f ai l u r e$ $E_{1}, E_{2} : o x i d e f i e l d s$ $γ_{d ec} : f i e l d a cce l er a t i o n in d ec a d es p er M V / c m$ $β : W e ib u l l s l o p e$ $t_{63} : c ha r a c t er i s t i c t im e; I n f in eo n : S i C g a t e o x i d es ha v e 3 t o 4 or d er s o f ma g ni t u d e m or e e x t r in s i c d e f ec t s t han S i, t h e in t r in s i c s t r e n g t h i s s imi l a r, e v er y d e v i ce i s scr ee n e d w i t h a hi g h g a t e p u l se, r e l iabi l i t y g r o w s e x p o n e n t ia l l y w i t h o x i d e t hi c k n ess w hi l e R_{c h} g r o w s l in e a r l y, a 100 d a y ma r a t h o n a t 150^{\circ} C g a v e 1 f ai l u r e in 1000 a t + 30 V an d n o n e a t + 25 an d - 15 V, w hi c h co n v er t s t o s in g l e - d i g i t pp m in 20 y e a r s a t 18 V w i t h a l in e a r E m o d e l an d β = 1; L i e t a l . (3 C - S i C c a p a c i t or s, 65 nm o x i d e) : 0.906 dec/ (MV/cm) b e tw ee n 7.5 an d 9 MV/cm, β n e a r 1 a t 8.5 an d 9 MV/cm b u t 0.39 a t 7.5 an d 0.58 a t 6 MV/cm, t h r ee f ai l u r e m ec hani s m s (e x t r in s i c d e f ec t s, f ab r i c a t i o n d e f ec t s, im p a c t i o ni s a t i o n ab o v e 8.5 MV/cm), an d 3450 pp m in 1 h a t 3 MV/cm a g ain s t 4100 pp m f or a 4 H - S i C M O S F E T$ $(co m p u t e d w i t h an a ss u m e d o x i d e o f 50 nm : 18 an d 30 V a r e 3.6 an d 6.0 MV/cm, an d w i t h 0.906 dec/ (MV/cm) (a ss u m e d t r an s f er ab l e f r o m 3 C) t h e s t e p o f 2.4 MV/cm i s 2.2 d ec a d es o f t im e)$

Bipolar Degradation of the Body Diode

Name	Formula	Related Formulae	Variables/Constants
Driving force for stacking-fault expansion	$τ_{S F} \approx - \frac{γ _{e f f}}{b _{p}}$	$γ_{e f f} = γ_{0} - Δ E_{e l} (Δ n)$	$τ_{S F} : r eso l v e d s h e a r s t r ess t ha t p u s h es t h e p a r t ia l d i s l oc a t i o n$ $γ_{e f f} : e f f ec t i v e s t a c k in g - f a u l t e n er g y u n d er inj ec t i o n (n e g a t i v e w h e n t h e f a u l t g r o w s)$ $b_{p} : B u r g er s v ec t or o f t h e S h oc k l ey p a r t ia l, a / 3 = 0.177 nm, t h e l e n g t h o f t h e p a r t ia l (1/3) ⟨ 1 \overset{ˉ}{1} 00 ⟩ o f N i s hi o e t a l . (2023) f or a = 0.3073 nm o f t h e C o n v e n t i o na l S e mi co n d u c t o r^{'} s M a t er ia l V a l u es p a g e$ $γ_{0} : s t a c k in g - f a u l t e n er g y w i t h o u t c a r r i er s$ $Δ E_{e l} : e n er g y g ain e d p er a r e a b y e l ec t r o n s t ha t d r o p in t o t h e f a u l t s t a t es$ $Δ n : e x cess c a r r i er d e n s i t y; H a r a d a e t a l . : s in g l e S h oc k l ey f a u l t s g r o w f r o m ba s a l - pl an e d i s l oc a t i o n s in t h e e p i t a x ia l l a y er (t y p i c a l d e n s i t y b e l o w 1 c m^{- 2}), 1 S S F e n er g y 14.7 mJ/ m^{2}, f a u l t l e v e l s 0.22 an d 0.59 eV b e l o w t h e co n d u c t i o n ban d f or s in g l e an d d o u b l e f a u l t s, Δ n o f 2 \times 1 0^{14} t o 2 \times 1 0^{15} c m^{- 3} g i v es 0.5 t o 3 mJ/ m^{2}, c u r v a t u r es o f 5 t o 50 μ m m e an γ o f - 0.6 t o - 6 mJ/ m^{2} an d s h e a r s t r esses o f 3 t o 30 MPa, f a r b e l o w t h e 5 t o 10 GPa cr i t i c a l s t r ess, so t h e g l i d e i s r eco mbina t i o n - e nhan ce d; a t hi c k b u f f er l a y er or p r o t o n i r r a d ia t i o n o f 1 \times 1 0^{11} t o 1 \times 1 0^{13} c m^{- 2} s u pp r esses t h e e x p an s i o n, an d ab o v e 1 \times 1 0^{12} c m^{- 2} t h e l i f e t im e f a l l s$ $(co m p u t e d w i t h b_{p} = 0.177 nm : - 0.6 an d - 6 mJ/ m^{2} g i v e 3.4 an d 34 MPa, w hi c h r e p r o d u ces t h e i r 3 t o 30 MPa; t h e f u l l 14.7 mJ/ m^{2} w o u l d b e 83 MPa)$
Loss of active area in the body diode and the MOSFET	$R_{D S (o n)} (f_{S F}) \approx \frac{R _{D S (o n)} ( 0 )}{1 - f _{S F}}$	$V_{S D} (f_{S F}) \approx V_{0} + \frac{I R _{d}}{1 - f _{S F}}$	$R_{D S (o n)} : o n - r es i s t an ce$ $f_{S F} : f r a c t i o n o f t h e a c t i v e a r e a co v er e d b y e x p an d e d f a u l t s$ $V_{S D} : b o d y - d i o d e f or w a r d v o l t a g e$ $V_{0} : k n ee v o l t a g e$ $I : c u r r e n t$ $R_{d} : d i f f er e n t ia l r es i s t an ce o f t h e h e a l t h y d i o d e (b o t h f or m s f o l l o w f r o m I n f in eo n^{'} s s t a t e m e n t t ha t t h e f a u l t s o n l y r e d u ce t h e a c t i v e a r e a, w i t h t h e r es i s t an ce in v er se l y p r o p or t i o na l t o t h e r e mainin g a r e a, d er i v e d); I n f in eo n : t h e f a u l t s g r o w u n d er bi p o l a r o p er a t i o n o f t h e b o d y d i o d e w i t hin min u t es t o h o u r s an d t h e n s a t u r a t e, t h ey r e d u ce o n l y t h e a c t i v e a r e a, so R_{D S (o n)} an d V_{S D} r i se w hi l e t h e b r e ak d o w n v o l t a g e, t h e s w i t c hin g an d t h e o x i d e a r e u n c han g e d$ $(co m p u t e d : f a u l t s o v er 10 an d 30 p er ce n t o f t h e a r e a r ai se R_{D S (o n)} b y f a c t or s o f 1.11 an d 1.43)$

Short Circuit, Cosmic Rays and Power Cycling

Name	Formula	Related Formulae	Variables/Constants
Short circuit, cosmic rays and power cycling of SiC devices	$I_{S C, p k} \approx 10 I_{n o m} (SiC), 4 I_{n o m} (IGBT)$	$λ \propto e^{c V / V_{B R}}$ $N_{f, S i C} = 0.33 N_{f, S i}$	$I_{S C, p k} : p e ak s h or t - c i r c u i t c u r r e n t$ $I_{n o m} : n o mina l c u r r e n t$ $λ : cos mi c - r a y f ai l u r e r a t e$ $c : co n s t an t$ $V : b l oc k in g v o l t a g e$ $V_{B R} : a v a l an c h e b r e ak d o w n v o l t a g e$ $N_{f} : p o w er cy c l es t o f ai l u r e o f t h e s am e m o d u l e d es i g n (t h r o ug h t h e k_{t hi c k n ess} f a c t or o f t h e S e mik r o n m o d e l); I n f in eo n : C oo l S i C M O S F E T s a r e s p ec i f i e d f or u p t o 3 μ s o f s h or t c i r c u i t (I GB T s ab o u t 10 μ s), t h e l oss f a l l s in 2 t o 3 μ s in t o t h e t hin s u r f a ce d r i f t z o n e, t h e n e u t r o n f l ux a t t h e g r o u n d i s ab o u t 20 n/ (c m^{2} h) an d t h e r a t e r i ses e x p o n e n t ia l l y w i t h V / V_{B R}, an d S i C ha s f e w er p o w er - cy c l in g seco n d s b ec a u se i t s hi g h er Y o u n g m o d u l u s s t r ain s t h e so l d er; S e mik r o n : k_{t hi c k n ess} = 0.33 f or S i C t o 1200 V$ $(n o n e w n u mb er s; t h e S e mik r o n n o t e an d M i cr oc hi p n or ma l i se t h e f l ux t o 13 n/ (c m^{2} h), 1.5 t im es b e l o w t h e 20 o f I n f in eo n)$

Ga2O3 Devices

Name	Formula	Related Formulae	Variables/Constants
Thermal conductivity of beta-Ga2O3 and its self-heating	$κ (T) = κ_{300} (\frac{300}{T})^{m}$	$R_{t h} \propto \frac{1}{κ}, Δ T = R_{t h} P$	$κ : t h er ma l co n d u c t i v i t y$ $κ_{300} : v a l u e a t 300 K$ $T : ab so l u t e t e m p er a t u r e$ $m : e x p o n e n t$ $R_{t h} : t h er ma l r es i s t an ce$ $Δ T : t e m p er a t u r e r i se$ $P : d i ss i p a t e d p o w er; G u o e t a l . (T D T R) : 27.0 W/ (m K) a l o n g [010] an d 10.9 W/ (m K) a l o n g [100] a t r oo m t e m p er a t u r e, m = 1.12 ([001]), 1.21 ([100]), 1.27 ([010]) an d 1.28 ([- 201]) b e tw ee n 200 an d 495 K, a g ain s t ab o u t 130 t o 230 W/ (m K) f or G a N, w hi c h t h ey a tt r ib u t e t o a s h or t er p h o n o n r e l a x a t i o n t im e$ $(co m p u t e d : [010] f a l l s t o 18.7 W/ (m K) a t 400 K an d 16.1 a t 450 K, [100] t o 7.7 an d 6.7; G a N co n d u c t s 4.8 t o 21 t im es b e tt er, so f or t h e s am e l a y o u t t h e G a 2 O 3 c hann e l h e a t s se v er a l t im es m or e, m y r e a d in g)$
Trapping at the gate dielectric of Ga2O3 transistors	$Δ V_{t h} (t) \approx A ln (1 + \frac{t}{τ _{c}})$	$E_{p h} \geq E_{C} - E_{T} \Rightarrow optical detrapping$	$Δ V_{t h} : t h r es h o l d s hi f t$ $A : am pl i t u d e$ $t : s t r ess or r eco v er y t im e$ $τ_{c} : s h or t es t t im e co n s t an t (a l o g a r i t hmi c l a w t ha t w r i t es t h e l o g a r i t hmi c k in e t i cs r e p or t e d b y F r e g o l e n t e t a l .; t h e i r o w n m o d e l e q u a t i o n w a s n o t r e a d)$ $E_{p h} : p h o t o n e n er g y, E_{C} - E_{T} : d e pt h o f t h e t r a p b e l o w t h e co n d u c t i o n ban d; F r e g o l e n t e t a l . (ab s t r a c t) : e l ec t r o n t r a pp in g in b or d er t r a p s n e a r t h e A l 2 O 3/ G a 2 O 3 in t er f a ce w i t h l o g a r i t hmi c k in e t i cs o v er m or e t han se v e n d ec a d es f or b o t h s t r ess an d r eco v er y; F ab r i s e t a l . (v er t i c a l F in F E T s, 35 nm A l 2 O 3) : V_{t h} i s s t ab l e u p t o 2 V q u i esce n t g a t e bia s an d t h e n r i ses b y l ess t han 1 V u p t o 4 V, i t d oes n o t r eco v er in t h e d a r k o v er 1 \times 1 0^{4} s, 280 nm l i g h t r eco v er s i t w i t h an o v er s h oo t, d e t r a pp in g f r o m t h e in t er f a ce s t a r t s a t 2.2 eV, an d t r a pp in g r e t u r n s ab o v e 3.5 eV f r o m t h e m e t a l / A l 2 O 3 ba r r i er$ $(n o n e w n u mb er s; a t r a p 2.2 eV d ee p ha s an e mi ss i o n t im e f a r b ey o n d t h e t es t a t r oo m t e m p er a t u r e, w hi c h f i t s t h e l a c k o f r eco v er y in t h e d a r k, m y r e a d in g)$

Important Questions

Ques: How large is the threshold drift of a SiC MOSFET: millivolts or volts?

Both, depending on the stress and the read-out. Puschkarsky et al. measure a short-term hysteresis of up to 4 $V$ under 50 kHz switching between -10 and +20 $V$ at 175 $^{\circ} C$ , and only 120 $mV$ between 5 and 25 $V$ , and say that Si devices show a few mV. Infineon reports a PBTI of about 100 $mV$ at 200 $^{\circ} C$ and +25 $V$ for its best devices, about 8 times the Si reference. The volts are mostly a fast, recoverable shift: half of a positive shift is gone after 100 ms and a negative shift disappears within about 100 ns at operating gate voltage. The permanent drift that sets the life is therefore the smaller value, and the volts matter for the switching transient and the gate drive design (my reading). Reference: K. Puschkarsky, H. Reisinger, T. Aichinger, W. Gustin and T. Grasser, ‘Understanding BTI in SiC MOSFETs and Its Impact on Circuit Operation’, IEEE Transactions on Device and Materials Reliability 18(2) (2018) (author copy at TU Wien, fetch-tool summary); Infineon Technologies, ‘How Infineon controls and assures the reliability of SiC based power semiconductors’, white paper, July 2020 (fetch-tool summary).

Ques: Why does the read-out delay change the measured activation energy of SiC threshold drift?

Because the traps empty during the delay, and they empty faster when the device is hot. With $E_{a} = k_{B} T ln (τ / τ_{0})$ and $τ_{0} = 1 0^{- 15}$ $s$ , a trap with a 1 ms emission time at 25 $^{\circ} C$ empties in about $1 \times 1 0^{- 7}$ $s$ at 175 $^{\circ} C$ (computed). A measurement with a delay of milliseconds therefore sees less of the shift at high temperature, and Puschkarsky et al. find an apparent activation energy that is negative for delays below 5 ms, and voltage acceleration factors that differ by orders of magnitude with the delay. They read out after 1 $μ s$ and consider the JEDEC delay of up to 48 $h$ unsuitable for SiC. A drift figure is therefore only comparable when the delay and the temperature are given with it. Reference: K. Puschkarsky, H. Reisinger, T. Aichinger, W. Gustin and T. Grasser, ‘Understanding BTI in SiC MOSFETs and Its Impact on Circuit Operation’, IEEE Transactions on Device and Materials Reliability 18(2) (2018) (author copy at TU Wien, fetch-tool summary).

Ques: Is the AC threshold drift of a SiC MOSFET set by the switching frequency or by the negative gate voltage?

By both, but the negative level decides whether it appears at all. Infineon says the AC drift is always positive, follows a power law in the number of switching events, $(t_{s} f)^{n}$ , and is enhanced only when the off-state gate voltage is below about -2.5 $V$ ; at 0 $V$ it behaves like DC BTI. Puschkarsky et al. find that the minimum threshold during switching depends exponentially on the low gate level and hardly on the high level. For an assumed n of 0.2 to 0.3, ten times the frequency gives 1.6 to 2.0 times the drift after the same time (computed). Both sources agree that a less negative off-level is the main remedy, and the frequency only matters once the off-level is negative enough. Reference: Infineon Technologies, ‘How Infineon controls and assures the reliability of SiC based power semiconductors’, white paper, July 2020 (fetch-tool summary); K. Puschkarsky, H. Reisinger, T. Aichinger, W. Gustin and T. Grasser, ‘Understanding BTI in SiC MOSFETs and Its Impact on Circuit Operation’, IEEE Transactions on Device and Materials Reliability 18(2) (2018) (author copy at TU Wien, fetch-tool summary).

Ques: Is the SiC gate oxide weaker than the oxide on silicon?

Not intrinsically. Infineon states that the intrinsic breakdown strength of SiO2 on SiC is similar to that on Si, and that the problem is an extrinsic defect density 3 to 4 orders of magnitude higher, which screening with a high gate pulse removes. Li et al. add that the conduction-band offset of 4H-SiC is about 2.7 $eV$ against 3.2 $eV$ for Si, so Fowler-Nordheim conduction starts at about 5 to 5.5 $MV/cm$ ; the exponential constant scales as the offset to the power 1.5, which gives 0.78 of the Si value (computed). The oxide is therefore not weaker but leakier at the same field, so SiC MOSFETs use thicker oxides and lower fields, and the screened population reaches the reliability of Si devices in Infineon’s data. Reference: Infineon Technologies, ‘How Infineon controls and assures the reliability of SiC based power semiconductors’, white paper, July 2020 (fetch-tool summary); F. Li, P. Mawby, Q. Song, A. Perez-Tomas, V. Shah, Y. Sharma, D. Hamilton, C. Fisher, P. Gammon and M. Jennings, ‘A First Evaluation of Thick Oxide 3C-SiC MOS Capacitors Reliability’, IEEE Transactions on Electron Devices 67 (2020), DOI 10.1109/TED.2019.2954911 (UAB repository copy, fetch-tool summary).

Ques: Is the Weibull slope of SiC gate-oxide breakdown about 1 or below 0.6?

Both are measured, in different regimes. Infineon extrapolates its marathon test with an assumed $β = 1$ for intrinsic failures. Li et al. find $β$ near 1 at 8.5 and 9 $MV/cm$ on 3C-SiC capacitors, but 0.39 at 7.5 and 0.58 at 6 $MV/cm$ , where extrinsic defects dominate, and they say the slopes of 4H-SiC are an order of magnitude larger. A slope below 1 means an early-failure population, which is what screening removes. For a screened 4H-SiC MOSFET the value of about 1 is the more likely, while for unscreened parts or larger areas the low slope must be used, because it gives far more failures at the use field (my reading). The 3C data are capacitors with a 65 $nm$ oxide, not MOSFETs. Reference: Infineon Technologies, ‘How Infineon controls and assures the reliability of SiC based power semiconductors’, white paper, July 2020 (fetch-tool summary); F. Li, P. Mawby, Q. Song, A. Perez-Tomas, V. Shah, Y. Sharma, D. Hamilton, C. Fisher, P. Gammon and M. Jennings, ‘A First Evaluation of Thick Oxide 3C-SiC MOS Capacitors Reliability’, IEEE Transactions on Electron Devices 67 (2020), DOI 10.1109/TED.2019.2954911 (UAB repository copy, fetch-tool summary).

Ques: Why does a stacking fault grow under forward current although the crystal is very hard?

Because the energy released by recombining carriers helps the dislocation glide. Harada et al. estimate the stress that pushes the partial from the curvature of the fault as 3 to 30 $MPa$ , far below the 5 to 10 $GPa$ needed to move a basal dislocation in SiC at room temperature, so the motion must be recombination-enhanced. Electrons drop into fault states 0.22 $eV$ below the conduction band, which makes the fault energy effectively negative, -0.6 to -6 $mJ/ m^{2}$ against +14.7 $mJ/ m^{2}$ without carriers. With a partial Burgers vector of 0.177 $nm$ these give 3.4 to 34 $MPa$ (computed), which reproduces their range. The growth stops when the fault reaches the surface or the buffer, which is why Infineon sees it saturate within minutes to hours. Reference: S. Harada, T. Mii, H. Sakane et al., ‘Suppression of stacking fault expansion in a 4H-SiC epitaxial layer by proton irradiation’, Scientific Reports 12, 13542 (2022) (fetch-tool summary; equations not rendered); Infineon Technologies, ‘How Infineon controls and assures the reliability of SiC based power semiconductors’, white paper, July 2020 (fetch-tool summary).

Ques: How much shorter is the short-circuit withstand time of a SiC MOSFET than that of an IGBT?

Infineon specifies its CoolSiC MOSFETs for up to 3 $μ s$ , against about 10 $μ s$ for industrial IGBTs, and tests each device. The reasons it gives are a peak current of about 10 times the nominal current against about 4 times for an IGBT, and a loss that falls within 2 to 3 $μ s$ into the thin surface part of the drift zone, so the heat cannot spread. The smaller chip of the same rating adds to this. The protection must therefore act within about 1 to 2 $μ s$ , faster than the 1 to 5 $μ s$ desaturation blanking used for IGBTs on the Silicon Power page, and a short-circuit-rated gate driver is part of the reliability of a SiC design (my reading). The Electrical Stress page discusses whether the oxide or thermal runaway fails first. Reference: Infineon Technologies, ‘How Infineon controls and assures the reliability of SiC based power semiconductors’, white paper, July 2020 (fetch-tool summary); Silicon Power MOSFET, IGBT and Thyristors page of this vault; Electrical Stress page of this vault.

Ques: Is the ground-level neutron flux 13 or 20 per square centimetre per hour?

The sources normalise differently. Infineon gives about 20 $n/ (c m^{2} h)$ at the ground, rising exponentially with altitude, while the Semikron and Microchip notes normalise to 13 $n/ (c m^{2} h)$ at New York sea level, 1.5 times lower (computed). The two can both be right, since the flux depends on the energy threshold counted, the latitude, the altitude and the solar cycle, which Semikron says changes it by about 20 per cent. For a FIT calculation the number that the device data were normalised to must be used, since mixing them gives an error of 1.5. The New York value of 13 is the more common reference for published FIT rates (my reading). Infineon also says that the rate rises exponentially with the voltage normalised to the breakdown voltage. Reference: Infineon Technologies, ‘How Infineon controls and assures the reliability of SiC based power semiconductors’, white paper, July 2020 (fetch-tool summary); U. Schilling, Semikron Danfoss, ‘Cosmic Ray Failures in Power Electronics’, Application Note AN 17-003, Rev. 01, 6 September 2024 (fetch-tool summary).

Ques: Why does a Ga2O3 transistor heat more than a GaN one of the same layout?

Because beta-Ga2O3 conducts heat poorly and anisotropically. Guo et al. measure 27.0 $W/ (m K)$ along [010] and 10.9 $W/ (m K)$ along [100] at room temperature, against about 130 to 230 $W/ (m K)$ for GaN, and the conductivity falls about as $T^{- 1.2}$ to $T^{- 1.3}$ , to 18.7 and 7.7 $W/ (m K)$ at 400 $K$ (computed). The thermal resistance of a channel scales roughly as $1/ κ$ , so the same power gives a temperature rise several times larger, and the rise reduces $κ$ further. The channel should run along [010], and the heat must be removed through the top or through a bonded high-conductivity substrate. This self-heating then accelerates the trapping and every thermally activated wear-out mechanism (my reading). Reference: Z. Guo, A. Verma, F. Sun, A. Hickman, T. Masui, A. Kuramata, M. Higashiwaki, D. Jena and T. Luo, ‘Anisotropic Thermal Conductivity in Single Crystal beta-Gallium Oxide’, arXiv:1412.7472 (journal and year not stated in the text read) (fetch-tool summary).

Ques: Does the threshold shift of a Ga2O3 MOSFET recover by itself?

In the reported devices, mostly not at room temperature. Fabris et al. stress vertical FinFETs at 4 $V$ gate bias for 30 $s$ and see a positive shift below 1 $V$ that does not recover during $1 \times 1 0^{4}$ $s$ in the dark, but recovers quickly, even with an overshoot, under 280 $nm$ light. The detrapping starts at a photon energy of 2.2 $eV$ , so the traps lie about 2.2 $eV$ below the conduction band, too deep for thermal emission at room temperature (my reading). Fregolent et al. find logarithmic kinetics over more than seven decades for both trapping and recovery in lateral MOSFETs, which means a wide spread of time constants. The shift therefore accumulates over the life unless the device is heated or illuminated. Reference: E. Fabris, C. De Santi, A. Caria, W. Li, K. Nomoto, Z. Hu, D. Jena, H. G. Xing, G. Meneghesso, E. Zanoni and M. Meneghini, ‘Trapping and Detrapping Mechanisms in beta-Ga2O3 Vertical FinFETs Investigated by Electro-Optical Measurements’, IEEE Transactions on Electron Devices 67(10), 3954-3960 (2020) (author copy, fetch-tool summary); M. Fregolent, E. Brusaterra, C. De Santi, K. Tetzner, J. Wuerfl, G. Meneghesso, E. Zanoni and M. Meneghini, ‘Logarithmic trapping and detrapping in beta-Ga2O3 MOSFETs: Experimental analysis and modeling’, Applied Physics Letters 120, 163502 (2022) (abstract only, FBH page).

References

K. Puschkarsky, H. Reisinger, T. Aichinger, W. Gustin and T. Grasser, ‘Understanding BTI in SiC MOSFETs and Its Impact on Circuit Operation’, IEEE Transactions on Device and Materials Reliability 18(2) (2018) (author copy at TU Wien, fetch-tool summary).
Infineon Technologies, ‘How Infineon controls and assures the reliability of SiC based power semiconductors’, white paper, July 2020 (fetch-tool summary).
F. Li, P. Mawby, Q. Song, A. Perez-Tomas, V. Shah, Y. Sharma, D. Hamilton, C. Fisher, P. Gammon and M. Jennings, ‘A First Evaluation of Thick Oxide 3C-SiC MOS Capacitors Reliability’, IEEE Transactions on Electron Devices 67 (2020), DOI 10.1109/TED.2019.2954911 (UAB repository copy, fetch-tool summary).
S. Harada, T. Mii, H. Sakane et al., ‘Suppression of stacking fault expansion in a 4H-SiC epitaxial layer by proton irradiation’, Scientific Reports 12, 13542 (2022) (fetch-tool summary; equations not rendered).
Silicon Power MOSFET, IGBT and Thyristors page of this vault.
Electrical Stress page of this vault.
U. Schilling, Semikron Danfoss, ‘Cosmic Ray Failures in Power Electronics’, Application Note AN 17-003, Rev. 01, 2024 (fetch-tool summary).
Z. Guo, A. Verma, F. Sun, A. Hickman, T. Masui, A. Kuramata, M. Higashiwaki, D. Jena and T. Luo, ‘Anisotropic Thermal Conductivity in Single Crystal beta-Gallium Oxide’, arXiv:1412.7472 (journal and year not stated in the text read) (fetch-tool summary).
E. Fabris, C. De Santi, A. Caria, W. Li, K. Nomoto, Z. Hu, D. Jena, H. G. Xing, G. Meneghesso, E. Zanoni and M. Meneghini, ‘Trapping and Detrapping Mechanisms in beta-Ga2O3 Vertical FinFETs Investigated by Electro-Optical Measurements’, IEEE Transactions on Electron Devices 67(10), 3954-3960 (2020) (author copy, fetch-tool summary).
M. Fregolent, E. Brusaterra, C. De Santi, K. Tetzner, J. Wuerfl, G. Meneghesso, E. Zanoni and M. Meneghini, ‘Logarithmic trapping and detrapping in beta-Ga2O3 MOSFETs: Experimental analysis and modeling’, Applied Physics Letters 120, 163502 (2022) (abstract only, FBH page).
J. Nishio et al., ‘Partial dislocation structures at expansion terminating areas of bar-shaped single Shockley-type stacking faults and basal plane dislocations at the origin in 4H-SiC’, Japanese Journal of Applied Physics 62, SC1001 (2023). Available: https://doi.org/10.35848/1347-4065/aca033.
Semikron Danfoss, ‘Power Cycle Model for IGBT Product Lines’, Application Note AN 21-001, Rev. 02, 2024 (fetch-tool summary).
Floating Gate Flash Memory (NOR and NAND), Conventional Semiconductor’s Material Values pages of this vault.

Quartz 5

Explorer

SiC and Ga2O3 Power Devices