1. Theory

Scope: This page covers two MOSFET variants that change how the source-channel barrier is controlled while keeping the standard channel equations: the Schottky-barrier MOSFET (SB-MOSFET) and the dynamic-threshold MOSFET (DTMOS).
SB-MOSFET definition: The doped source and drain are replaced by metal or metal-silicide contacts, so carriers enter the channel over or through a Schottky barrier.
Gate-thinned barrier: The gate field bends the bands at the source and thins the Schottky barrier, so tunnelling injection rises exponentially with gate voltage.
Ambipolarity: Both contacts are Schottky barriers, so the drain can inject the opposite carrier type at negative gate bias.
DTMOS definition: The gate is electrically tied to the body (well or SOI body), so the body bias, and hence $V_{T H}$ , change with the gate voltage.
Body-effect reversal: Raising the gate forward-biases the body, lowering $V_{T H}$ exactly when the device turns on.

2. Working Principle

SB-MOSFET on-state: Current is the sum of thermionic emission over the barrier and field-assisted tunnelling through it (Tsu-Esaki integral); a low barrier height is needed for high on-current.
SB-MOSFET off-state: Leakage is lowest where electron injection at the source equals hole injection at the drain (near $V_{GS} \approx V_{D S} /2$ ); dopant segregation at the silicide interface lowers the effective barrier.
SB-MOSFET benefits: Abrupt, shallow, low-resistance contacts made at low temperature, with no dopant diffusion to cause short-channel problems.
DTMOS off-state: At $V_{GS} = 0$ the body sits at the source potential, so the device keeps its normal $V_{T H}$ and low leakage.
DTMOS on-state: The falling threshold boosts overdrive and transconductance ( $g_{m, D T} = (1 + η) g_{m}$ ), and the swing approaches 60 mV/dec.
DTMOS voltage limit: The body-source junction forward-biases, so the gate must stay below about 0.6 V to avoid body current and parasitic bipolar action.

3. Applications

Current status: Both are mainly research or niche devices rather than mainstream CMOS.
Ultra-low-voltage circuits (DTMOS): Sub-0.5 V logic and analog on SOI for energy-harvesting, biomedical and wearable chips.
Contacts for 2D and nanotube FETs (SB-MOSFET): Most CNT and 2D-material transistors operate as Schottky-barrier FETs.
Reconfigurable FETs (SB-MOSFET, research): Ambipolar Schottky contacts let one device switch between n- and p-type behaviour with a program gate.

Schottky-Barrier MOSFET

Name	Formula	Related Formulae	Variables/Constants
Source and drain barrier heights	$ϕ_{B n} = ϕ_{M} - χ_{s} (electrons)$ $ϕ_{B p} = \frac{E _{g}}{q} - ϕ_{B n} (holes)$	$(see Metal-Semiconductor Contacts page; real barriers are modified by Fermi-level pinning)$	$ϕ_{B n}, ϕ_{B p} : e l ec t r o n an d h o l e S c h o tt k y ba r r i er h e i g h t s o f t h e so u r ce an d d r ain s i l i c i d e$ $ϕ_{M} : s i l i c i d e w or k f u n c t i o n$ $χ_{s} : s i l i co n e l ec t r o n a f f ini t y$ $E_{g} : s i l i co n ban d g a p$
Image-force barrier lowering	$Δ ϕ_{B} = \frac{q E _{ma x}}{4 π ε _{s}}$	$ϕ_{B, e f f} = ϕ_{B} - Δ ϕ_{B} (see Metal-Semiconductor Contacts page)$	$E_{ma x} : e l ec t r i c f i e l d a t t h e m e t a l - se mi co n d u c t or in t er f a ce a t t h e so u r ce, se t main l y b y t h e g a t e an d d r ain v o l t a g es$
Tunneling probability through the source barrier	$T \approx exp (- \frac{4 2 m ^{*} ( q ϕ _{B} ) ^{3/2}}{3 q ℏ E _{s}})$	$T \approx exp (- \frac{2 W _{B}}{ℏ} 2 m^{*} q ϕ_{B}) (rectangular barrier of width W_{B})$	$T : W K B t r an s mi ss i o n p r o babi l i t y f or c a r r i er s a t t h e m e t a l F er mi l e v e l$ $E_{s} : e l ec t r i c f i e l d in t h e ba r r i er a t t h e so u r ce, in cr e a se d b y t h e g a t e bia s$ $m^{*} : t u nn e l in g e f f ec t i v e ma ss$ $(same form as the Zener Diode page with E_{g} replaced by q ϕ_{B})$
Tunneling-plus-thermionic injection current (Tsu-Esaki)	$J = \frac{q m ^{*} k _{B} T}{2 π ^{2} ℏ ^{3}} \int_{0}^{\infty} T (E) ln [\frac{1 + e x p ( \frac{E _{F} - E}{k _{B} T} )}{1 + e x p ( \frac{E _{F} - E - q V _{D S}}{k _{B} T} )}] d E$	$J_{T E} = A^{*} T^{2} exp (- \frac{q ϕ _{B}}{k _{B} T}) [exp (\frac{q V}{k _{B} T}) - 1] (thermionic limit, see Schottky Diode page)$	$J : c u r r e n t d e n s i t y inj ec t e d a cr oss t h e ba r r i er, in c l u d in g c a r r i er s t ha t t u nn e l an d t h ose t h er ma l l y e x c i t e d ab o v e i t$ $T (E) : e n er g y - d e p e n d e n t t r an s mi ss i o n p r o babi l i t y$ $E_{F} : F er mi l e v e l o f t h e so u r ce m e t a l$ $V_{D S} : a ppl i e d d r ain - so u r ce v o l t a g e$ $(the gate controls T (E) through the barrier thickness and field)$ $k_{B} : B o l t z mann co n s t an t$
Ambipolar minimum current	$V_{GS, min} \approx \frac{V _{D S}}{2}$	$I_{n} \propto T_{S} (V_{GS}), I_{p} \propto T_{D} (V_{GS} - V_{D S})$	$V_{GS, min} : g a t e v o l t a g e a t w hi c h t h e o f f - s t a t e c u r r e n t i s l o w es t (i d e a l g a t e co n t r o l, sy mm e t r i c mi d - g a p ba r r i er s)$ $I_{n}, I_{p} : e l ec t r o n c u r r e n t inj ec t e d a t t h e so u r ce an d h o l e c u r r e n t inj ec t e d a t t h e d r ain$ $T_{S}, T_{D} : t r an s mi ss i o n a t t h e so u r ce an d d r ain ba r r i er s$

Dynamic-Threshold MOSFET

Name	Formula	Related Formulae	Variables/Constants
Dynamic threshold voltage	$V_{T H} (V_{GS}) = V_{T H 0} + γ (2 ϕ_{F} - V_{GS} - 2 ϕ_{F})$	$V_{B S} = V_{GS}, V_{S B} = - V_{GS} (body effect, see Long Channel MOSFET page)$	$V_{T H 0} : t h r es h o l d v o l t a g e a t V_{S B} = 0 (t h e o f f - s t a t e v a l u e a t V_{GS} = 0)$ $γ : b o d y e f f ec t coe f f i c i e n t$ $V_{B S} : b o d y - so u r ce v o l t a g e, t i e d t o t h e g a t e v o l t a g e$ $(the threshold falls as the gate voltage rises, since forward body bias lowers it)$
Body-source junction current	$I_{B} = I_{S} [exp (\frac{V _{GS}}{V _{T}}) - 1]$	$V_{GS} ≲ 0.6 V (body-source junction turn-on, see PN Junction Diode page)$	$I_{B} : f or w a r d c u r r e n t o f t h e b o d y - so u r ce j u n c t i o n w h e n t h e g a t e d r i v es t h e b o d y$ $I_{S} : j u n c t i o n s a t u r a t i o n c u r r e n t$ $V_{T} : t h er ma l v o l t a g e, k_{B} T / q$ $(limits the operating supply to about 0.6 V)$ $k_{B} : B o l t z mann co n s t an t$
Subthreshold swing	$S = ln (10) \frac{k _{B} T}{q} \frac{1 + C _{d} / C _{o x}}{1 + ( C _{d} / C _{o x} ) \frac{\partial V _{B S}}{\partial V _{GS}}} \to ln (10) \frac{k _{B} T}{q} (\frac{\partial V _{B S}}{\partial V _{GS}} = 1)$	$S (\partial V_{B S} / \partial V_{GS} = 0) = ln (10) \frac{k _{B} T}{q} (1 + \frac{C _{d}}{C _{o x}}), S_{min} \approx 60 mV/dec at 300 K$	$S : s u b t h r es h o l d s w in g o f t h e D T M O S$ $C_{d} : d e pl e t i o n c a p a c i t an ce p er u ni t a r e a$ $\partial V_{B S} / \partial V_{GS} : f r a c t i o n o f a g a t e v o l t a g e c han g e t ha t a l so a pp e a r s o n t h e b o d y (1 w h e n t h e b o d y i s t i e d t o t h e g a t e)$ $(compare the Long Channel MOSFET page, where S = ln (10) (k_{B} T / q) (1 + C_{d} / C_{o x}); tying the body to the gate removes the capacitive-divider loss)$ $k_{B} : B o l t z mann co n s t an t$
Transconductance enhancement	$g_{m, D T} = g_{m} + g_{mb} = (1 + η) g_{m}$	$η = \frac{γ}{2 2 ϕ _{F} - V _{GS}}$	$g_{m, D T} : t r an sco n d u c t an ce o f t h e D T M O S w i t h r es p ec t t o t h e co mm o n g a t e - b o d y v o l t a g e$ $g_{mb} = η g_{m} : b o d y t r an sco n d u c t an ce (see L o n g C hann e l M O S F E T p a g e)$ $η : b o d y e f f ec t r a t i o, w hi c h in cr e a ses w i t h f or w a r d bia s$
Saturation current with dynamic threshold	$I_{D s a t} = \frac{μ _{n} C _{o x}}{2 m} \frac{Z}{L} [V_{GS} - V_{T H} (V_{GS})]^{2}$	$(see Long Channel MOSFET page for the fixed-threshold form)$	$m : b o d y f a c t or, 1 + C_{d} / C_{o x}$ $(the effective overdrive grows faster than V_{GS} because V_{T H} falls)$
Parasitic lateral bipolar contribution	$I_{D} = I_{M O S} + β I_{B}$	$β of the lateral n-p-n (source-body-drain), see BJT page$	$I_{M O S} : M O S F E T c hann e l c u r r e n t$ $β I_{B} : co l l ec t or c u r r e n t o f t h e p a r a s i t i c n - p - n, w h ose ba se c u r r e n t i s t h e f or w a r d b o d y c u r r e n t I_{B}$ $(more significant in floating-body SOI devices)$

Important Questions

Ques: Why replace doped source and drain with metal, and how does the gate still control the current?

Metal or silicide contacts form an abrupt, very shallow source and drain with low sheet resistance and a low-temperature process, and they avoid the dopant diffusion that causes short-channel problems such as lateral diffusion and punchthrough (see the Short Channel MOSFET page). The cost is that carriers must cross a Schottky barrier at the source. A gate bias bends the bands at the source and thins the barrier, so tunneling through it, described by the probability $T$ , rises exponentially with the field $E_{s}$ ; the current is then the Tsu-Esaki integral of $T (E)$ weighted by the source supply, together with the thermionic contribution over the barrier. For a large on-current the barrier height $ϕ_{B}$ must be low (hence silicides such as erbium or ytterbium for n-type and platinum for p-type), since $T$ depends exponentially on $ϕ_{B}^{3/2}$ . Reference: J.M. Larson and J.P. Snyder, “Overview and status of metal S/D Schottky-barrier MOSFET technology,” IEEE Trans. Electron Devices 53, 1048 (2006); R. Tsu and L. Esaki, Appl. Phys. Lett. 22, 562 (1973).

Ques: Why is the SB-MOSFET ambipolar, and what sets the off-state minimum?

Both source and drain are Schottky contacts, so the drain barrier can inject the opposite carrier type: when the gate is driven negative enough, holes tunnel in from the drain, which is controlled by $V_{G D} = V_{GS} - V_{D S}$ , while electrons are injected at the source by $V_{GS}$ . The off-state current is smallest where these two contributions are equal, which for symmetric barriers and ideal gate control occurs near $V_{GS} \approx V_{D S} /2$ , and the current rises again for more negative $V_{GS}$ . The ambipolar rise limits the usable on-off ratio and raises leakage at high $V_{D S}$ , which is why barrier engineering (for example dopant segregation at the silicide interface) and lower drain voltages are used. Reference: J.M. Larson and J.P. Snyder, IEEE Trans. Electron Devices 53, 1048 (2006).

Ques: How does tying the gate to the body lower the threshold dynamically, and why does it improve the subthreshold swing?

In the off-state ( $V_{GS} = 0$ ) the body is at the source potential and the device has its normal threshold $V_{T H 0}$ and low leakage. As the gate voltage rises, the body is forward biased by the same amount, so the threshold falls according to the body-effect relation with $V_{S B} = - V_{GS}$ , and the overdrive $V_{GS} - V_{T H} (V_{GS})$ grows faster than $V_{GS}$ alone. In subthreshold, the barrier between source and channel is lowered one-for-one by the body bias, which follows the gate, so the capacitive-divider factor $1 + C_{d} / C_{o x}$ of the Long Channel MOSFET page is removed and the swing approaches the thermal limit of about 60 mV/dec at 300 K. The same relation gives $g_{m, D T} = (1 + η) g_{m}$ , since a change in gate voltage also changes the body voltage. Reference: F. Assaderaghi et al., “A dynamic threshold voltage MOSFET (DTMOS) for very low voltage operation,” IEEE Electron Device Lett. 15, 510 (1994).

Ques: What limits DTMOS operation, and why is it often built on SOI?

The body-source junction is forward biased whenever the gate is high, so the junction current $I_{B}$ grows exponentially and the gate must stay below roughly 0.6 V, which makes DTMOS suited to very-low-voltage circuits. Above that, the body current wastes power, loads the gate drive, and, through the parasitic lateral n-p-n, adds a bipolar current $β I_{B}$ to the channel current. The gate also sees extra capacitance from the body junctions. In bulk CMOS the common gate-body connection requires isolated wells and adds area, whereas in SOI each device has its own isolated body, so the tie is straightforward. Reference: F. Assaderaghi et al., IEEE Trans. Electron Devices 44, 414 (1997).

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Schottky Barrier and Dynamic Threshold_MOSFET