This page covers the degradation of silicon bipolar junction transistors and SiGe heterojunction bipolar transistors (HBTs): the loss of current gain by hot carriers at the emitter-base spacer, after reverse emitter-base bias or mixed-mode stress, and the thermal limits of second breakdown and current hogging. Radiation damage and the enhanced low-dose-rate sensitivity of bipolar parts are on the Radiation page, and the hot-carrier bond-breaking models on the CMOS Logic Transistors page.

1. Why It Happens

  • Trigger: A reverse bias of the emitter-base junction near its breakdown; mixed-mode operation at a high collector current and a collector-base voltage near or above ; large-signal RF drive that swings above ; and a high power at high voltage in power BJTs (Weimer et al.; Puglisi et al.; Gaur).
  • Mechanism, hot carriers: Carriers from impact ionisation in the collector-base junction, or from the reverse-biased emitter-base junction, reach the spacer oxide at the emitter edge and the shallow trench isolation and break Si-H bonds; hot holes above about 1.5 dominate in SiGe HBTs (Kamrani et al.; Puglisi et al.). The new traps add a recombination current that raises the base current at low injection (Weimer et al.).
  • Mechanism, second breakdown: Current and heat concentrate in a hot spot, under the emitter centre at high voltage or at the emitter edge at high current, until the base becomes intrinsic; at high voltage, avalanche injection starts it (Gaur).
  • Mechanism, current hogging: In a multi-finger device the hottest finger needs a lower , takes more current and heats further, unless an emitter ballast resistance stops the feedback (see the stability row).
  • What sets the rate: The collector current and the collector-base voltage through the impact ionisation (Puglisi et al.; Kamrani et al.); the stress time as a power law with exponent 0.5 that falls after hundreds of hours (Puglisi et al.); the thermal resistance, the power density and the voltage for the thermal limits (Gaur).
  • Failure criterion: A rise of the low-injection base current or a fall of the current gain beyond the circuit margin; for HBTs 15 or 20 per cent are used, as on the GaAs and InP page; an intrinsic base for second breakdown (Gaur).

2. Where to Look

  • Location: The emitter-base spacer oxide and the shallow trench isolation next to the emitter (Weimer et al.; Kamrani et al.); the centre or the edge of the emitter for second breakdown (Gaur); the hottest finger in the middle of a multi-finger array.
  • Signature: A Gummel plot whose base current rises at low while the high-injection part is unchanged (Weimer et al.); a gain that falls only at low current; random telegraph noise in the base current of small HBTs (Puglisi et al.); a hot spot in infrared images before breakdown (Raytheon).
  • Confirm with: Gummel plots before and after stress, forward and inverse (Weimer et al.); simulation of the trap density at the spacer (Puglisi et al.); infrared thermography of power transistors (Raytheon).
  • Look-alikes: Self-heating anneals interface traps, so a strong RF stress can lower the base current and hide the damage (Weimer et al.). A rise of the series resistance also degrades the transit frequency, but in one study it was too small to explain it (Weimer et al.).

3. Prevention

  • Design: Limit the reverse emitter-base voltage and avoid operation above in DC; for multi-finger devices add emitter ballast (see the stability row); keep the power within the SOA, which a thermal model predicts better at low voltage than at high voltage (Gaur).
  • Material and process: Low- material, since lower turn-on voltage gives longer life in AlGaAs HBTs (Livingston).
  • Operation: Keep the RF drive below the level that swings far beyond breakdown (Weimer et al.); keep the junction temperature low, since the base becomes intrinsic at a few hundred degrees in a hot spot (Gaur).
  • Screening and test: Mixed-mode stress at high current and near the SOA border, with the time exponent measured beyond the first hundreds of hours (Puglisi et al.; Kamrani et al.); infrared screening of power transistors for early hot spots (Raytheon).

Hot-Carrier Damage of the Emitter-Base Spacer

NameFormulaRelated FormulaeVariables/Constants
Interface-trap generation at the emitter-base spacer









Excess base current from the new traps








Trap time constants and random telegraph noise in small HBTs




Second Breakdown and Thermal Stability

NameFormulaRelated FormulaeVariables/Constants
Thermal second breakdown (Gaur)








Electrothermal stability of a multi-finger transistor








Important Questions

Ques: Why does hot-carrier damage in a bipolar transistor show up mainly at low current?

Because the new traps add a recombination current with an ideality of about 2. The ideal base current grows as and the trap current as , so their ratio falls as : from 0.5 to 0.8 the relative excess falls by about 330 times (computed). Weimer et al. see exactly this after mixed-mode stress, an excess base current at low injection in forward and inverse operation, from traps at the spacer oxide and the trench isolation. The gain at the operating point of an amplifier therefore changes much less than the low-current gain, and circuits that run at low current, such as references and low-power front ends, are the most sensitive (my reading). Reference: C. Weimer, P. Sakalas, M. Mueller, G. G. Fischer and M. Schroeter, ‘An Experimental Load-Pull Based Large-Signal RF Reliability Study of SiGe HBTs’ (venue and year not stated, references to 2021; TU Dresden copy) (fetch-tool summary); F. M. Puglisi, L. Larcher and P. Pavan, ‘Mixed-Mode Stress in Silicon-Germanium Heterostructure Bipolar Transistors: Insights from Experiments and Simulations’, IEEE Transactions on Device and Materials Reliability 19(2) (2019) (author copy, fetch-tool summary).

Ques: Can the hot-carrier degradation of a SiGe HBT be extrapolated with a single time exponent?

Not over the whole life. Puglisi et al. find that the trap density at the emitter-base spacer grows as under mixed-mode stress at 1 and 3 , but that the exponent falls after about 800 to 1000 , which they attribute to hot holes at high defect density. Kamrani et al. model the same process with a generation term and a re-passivation term, , which also saturates. A 5000 test extrapolated to 10 years with 0.5 gives 250 times the trap density (computed), an overestimate if the exponent falls. The saturating model is therefore the more likely to give the real end-of-life value, and short tests give an upper bound (my reading). Reference: F. M. Puglisi, L. Larcher and P. Pavan, ‘Mixed-Mode Stress in Silicon-Germanium Heterostructure Bipolar Transistors: Insights from Experiments and Simulations’, IEEE Transactions on Device and Materials Reliability 19(2) (2019) (author copy, fetch-tool summary); H. Kamrani, D. Jabs, V. d’Alessandro, N. Rinaldi and C. Jungemann, ‘Physics-Based Hot-Carrier Degradation Model for SiGe HBTs’, SISPAD 2016, 341-344 (TU Wien proceedings copy, fetch-tool summary).

Ques: Is the damage of a SiGe HBT under stress caused by hot electrons or hot holes?

Both sources point to holes for the spacer damage. Kamrani et al. find that hot carriers above about 1.5 have a much higher chance of breaking Si-H bonds directly, and that hot holes dominate the carrier density along the emitter-base spacer oxide under mixed-mode stress. Puglisi et al. describe carriers from impact ionisation in the collector-base space-charge region accelerated toward the spacer, and invoke hot holes for the reduced time exponent at long times. The trap generation depends on carrier energy rather than field (Kamrani et al.). Reference: H. Kamrani, D. Jabs, V. d’Alessandro, N. Rinaldi and C. Jungemann, ‘Physics-Based Hot-Carrier Degradation Model for SiGe HBTs’, SISPAD 2016, 341-344 (TU Wien proceedings copy, fetch-tool summary); F. M. Puglisi, L. Larcher and P. Pavan, ‘Mixed-Mode Stress in Silicon-Germanium Heterostructure Bipolar Transistors: Insights from Experiments and Simulations’, IEEE Transactions on Device and Materials Reliability 19(2) (2019) (author copy, fetch-tool summary).

Ques: At what temperature does second breakdown destroy a bipolar transistor?

Gaur defines the failure as the temperature at which the base becomes intrinsic, which depends on its doping. With his fit the base becomes intrinsic at about 361 for , 502 for and 714 for (computed). His fit gives at 300 , against the accepted value of about , so the temperatures are slightly low, on the safe side (my reading). The hot spot reaches these values in about 0.35 to 0.5 ms in his examples. The conductivity of silicon falls from 1.58 to 0.80 between 300 and 500 (computed), which concentrates the heat and makes the hot spot run away. Reference: S. P. Gaur, ‘Safe Operating Area for Bipolar Transistors’, IBM Journal of Research and Development 21, 433-442 (1977) (scan, fetch-tool summary; OCR partly garbled).

Ques: Why do some power transistors reach second breakdown at a lower voltage than others of the same type?

Because some already have a hot spot within their rated stress. The Raytheon study for NASA tested 200 power transistors from the rated power upward and found that devices with an initial hot spot broke down at a lower voltage than those without, that the radiated power of the hot spot indicated the breakdown voltage, and that the breakdown occurred at the hot spot. The location of the hot spot changed between forward and reverse bias of the same device. Gaur’s model explains the mechanism: current and heat concentrate under the emitter centre at high voltage and at the emitter edge at high current. Infrared screening for early hot spots can therefore remove the weak devices before use, since the electrical response of good and weak parts was the same. Reference: Raytheon for NASA Marshall Space Flight Center, ‘Study of Second Breakdown in Power Transistors Using Infrared Techniques’, NASA Tech Brief 71-10021, January 1971 (fetch-tool summary); S. P. Gaur, ‘Safe Operating Area for Bipolar Transistors’, IBM Journal of Research and Development 21, 433-442 (1977) (scan, fetch-tool summary; OCR partly garbled).

Ques: How much emitter ballast does a multi-finger transistor need?

Enough to cancel the thermal feedback. A finger at a higher temperature needs about 2 less for the same current, so its current rises by the factor per unit of current, and a ballast resistance subtracts from this. The finger is stable while (derived; 2 is the typical value of the Toshiba thermal-stability note). With an assumed 2000 per finger and 3 , the critical current is 2.2 without ballast and 3.7 with 5 , and a ballast of removes the limit altogether, at the cost of some voltage drop (computed). This is the same feedback as the thermal-stability criterion on the Thermal Stress page. Reference: Thermal Stress page of this vault; H. Livingston (BAE Systems), ‘A Survey of Heterojunction Bipolar Transistor (HBT) Device Reliability’, updated 3 June 2003 (fetch-tool summary); Toshiba Electronic Devices and Storage, ‘Bipolar Transistors Application Note: Thermal Stability and Thermal Design’, 2018.

References

  1. C. Weimer, P. Sakalas, M. Mueller, G. G. Fischer and M. Schroeter, ‘An Experimental Load-Pull Based Large-Signal RF Reliability Study of SiGe HBTs’ (venue and year not stated, references to 2021; TU Dresden copy) (fetch-tool summary).
  2. F. M. Puglisi, L. Larcher and P. Pavan, ‘Mixed-Mode Stress in Silicon-Germanium Heterostructure Bipolar Transistors: Insights from Experiments and Simulations’, IEEE Transactions on Device and Materials Reliability 19(2) (2019) (author copy, fetch-tool summary).
  3. H. Kamrani, D. Jabs, V. d’Alessandro, N. Rinaldi and C. Jungemann, ‘Physics-Based Hot-Carrier Degradation Model for SiGe HBTs’, SISPAD 2016, 341-344 (TU Wien proceedings copy, fetch-tool summary).
  4. S. P. Gaur, ‘Safe Operating Area for Bipolar Transistors’, IBM Journal of Research and Development 21, 433-442 (1977) (scan, fetch-tool summary; OCR partly garbled).
  5. Raytheon for NASA Marshall Space Flight Center, ‘Study of Second Breakdown in Power Transistors Using Infrared Techniques’, NASA Tech Brief 71-10021, January 1971 (fetch-tool summary).
  6. Thermal Stress page of this vault.
  7. H. Livingston (BAE Systems), ‘A Survey of Heterojunction Bipolar Transistor (HBT) Device Reliability’, updated 3 June 2003 (fetch-tool summary).
  8. Toshiba Electronic Devices and Storage, ‘Bipolar Transistors Application Note: Thermal Stability and Thermal Design’, 2018. Available: https://www.mouser.lt/pdfDocs/Bipolar_Transistor_Thermal_Stability.pdf.
  9. PN Junction page of this vault.

Related pages in this vault: CMOS Logic Transistors, GaAs and InP HEMT, MESFET and HBT, Radiation, Thermal Stress, SiC and Ga2O3 Power Devices, GaN HEMT (degradation), Silicon Power MOSFET, IGBT and Thyristors, Bipolar Junction Transistor (BJT), Electrical Stress.